Searched refs:I40E_L4_DST_MASK (Results 1 – 3 of 3) sorted by relevance
3034 if (i_set & I40E_L4_DST_MASK) in i40e_get_rss_hash_opts()3270 if (input_set & I40E_L4_DST_MASK) in i40e_get_ethtool_fdir_entry()3364 i_set |= I40E_L4_DST_MASK; in i40e_get_rss_hash_bits()3366 i_set &= ~I40E_L4_DST_MASK; in i40e_get_rss_hash_bits()3997 old_value = !!(old & I40E_L4_DST_MASK); in i40e_print_input_set()3998 new_value = !!(new & I40E_L4_DST_MASK); in i40e_print_input_set()4139 new_mask |= I40E_L4_DST_MASK; in i40e_check_fdir_input_set()4141 new_mask &= ~I40E_L4_DST_MASK; in i40e_check_fdir_input_set()4171 new_mask |= I40E_L4_SRC_MASK | I40E_L4_DST_MASK; in i40e_check_fdir_input_set()4173 new_mask &= ~(I40E_L4_SRC_MASK | I40E_L4_DST_MASK); in i40e_check_fdir_input_set()
1420 #define I40E_L4_DST_MASK (0x1ULL << I40E_L4_DST_SHIFT) macro
8411 I40E_L4_SRC_MASK | I40E_L4_DST_MASK); in i40e_fdir_filter_exit()8416 I40E_L4_SRC_MASK | I40E_L4_DST_MASK); in i40e_fdir_filter_exit()8421 I40E_L4_SRC_MASK | I40E_L4_DST_MASK); in i40e_fdir_filter_exit()8854 I40E_L4_SRC_MASK | I40E_L4_DST_MASK); in i40e_reenable_fdir_atr()
