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Searched refs:HSYNC (Results 1 – 25 of 30) sorted by relevance

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/Linux-v5.10/drivers/gpu/drm/nouveau/dispnv50/
Ddac507d.c37 sync |= NVVAL(NV507D, DAC_SET_POLARITY, HSYNC, asyh->or.nhsync); in dac507d_ctrl()
/Linux-v5.10/Documentation/devicetree/bindings/media/i2c/
Dtvp514x.txt17 - hsync-active: HSYNC Polarity configuration for endpoint.
Dtvp7002.txt10 - hsync-active: HSYNC Polarity configuration for the bus. Default value when
Dov7670.txt13 - hsync-active: active state of the HSYNC signal, 0/1 for LOW/HIGH respectively.
Dst,st-mipid02.txt45 - hsync-active: active state of the HSYNC signal, 0/1 for LOW/HIGH respectively.
Dov5640.txt38 - hsync-active: active state of the HSYNC signal, 0/1 for LOW/HIGH respectively.
Dtvp5150.txt44 - hsync-active: Active state of the HSYNC signal. Must be <1> (HIGH).
/Linux-v5.10/drivers/video/fbdev/i810/
Di810_regs.h150 #define HSYNC 0x60008 macro
/Linux-v5.10/Documentation/fb/
Dpxafb.rst39 hsynclen:HSYNC == LCCR1_HSW + 1
65 hsync:HSYNC, vsync:VSYNC
Dmatroxfb.rst271 left:X left boundary: pixels between end of HSYNC pulse and first pixel.
273 right:X right boundary: pixels between end of picture and start of HSYNC
275 hslen:X length of HSYNC pulse, in pixels. Default is derived from `vesa`
279 sync:X sync. pulse - bit 0 inverts HSYNC polarity, bit 1 VSYNC polarity.
280 If bit 3 (value 0x08) is set, composite sync instead of HSYNC is
/Linux-v5.10/include/video/
Dsstfb.h161 #define HSYNC 0x0220 macro
/Linux-v5.10/Documentation/devicetree/bindings/media/
Dvideo-interfaces.txt477 - hsync-active: active state of the HSYNC signal, 0/1 for LOW/HIGH respectively.
479 Note, that if HSYNC and VSYNC polarities are not specified, embedded
481 - data-active: similar to HSYNC and VSYNC, specifies data line polarity.
482 - data-enable-active: similar to HSYNC and VSYNC, specifies the data enable
/Linux-v5.10/arch/arm/boot/dts/
Dimx53-mba53.dts146 /* VGA_VSYNC, HSYNC with max drive strength */
Dam437x-sbc-t43.dts60 AM4372_IOPAD(0x8e4, PIN_OUTPUT_PULLUP | MUX_MODE0) /* DSS HSYNC */
Dimx6ul-tx6ul-mainboard.dts205 MX6UL_PAD_LCD_HSYNC__LCDIF_HSYNC 0x10 /* HSYNC */
Dimx6ul-tx6ul.dtsi623 MX6UL_PAD_LCD_HSYNC__LCDIF_HSYNC 0x10 /* HSYNC */
656 MX6UL_PAD_LCD_HSYNC__LCDIF_HSYNC 0x10 /* HSYNC */
Dimx6qdl-kontron-samx6i.dtsi588 MX6QDL_PAD_DI0_PIN2__IPU1_DI0_PIN02 0x100f1 /* HSYNC */
Dam437x-sk-evm.dts372 AM4372_IOPAD(0x8e4, PIN_OUTPUT | MUX_MODE0) /* DSS HSYNC */
Dat91sam9g45.dtsi282 AT91_PIOB 30 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* HSYNC */
/Linux-v5.10/Documentation/devicetree/bindings/display/exynos/
Dexynos_dp.txt41 HSYNC polarity configuration.
/Linux-v5.10/drivers/gpu/drm/i2c/
Dch7006_mode.c122 .flags = DRM_MODE_FLAG_##hsynp##HSYNC | \
/Linux-v5.10/drivers/gpu/drm/i915/gvt/
Dhandlers.c2150 MMIO_D(HSYNC(TRANSCODER_A), D_ALL); in init_generic_mmio_info()
2160 MMIO_D(HSYNC(TRANSCODER_B), D_ALL); in init_generic_mmio_info()
2170 MMIO_D(HSYNC(TRANSCODER_C), D_ALL); in init_generic_mmio_info()
2180 MMIO_D(HSYNC(TRANSCODER_EDP), D_ALL); in init_generic_mmio_info()
/Linux-v5.10/drivers/pinctrl/renesas/
Dpfc-sh7786.c525 GPIO_FN(HSYNC),
/Linux-v5.10/drivers/video/fbdev/
Dsstfb.c534 sst_write(HSYNC, (par->hSyncOff - 1) << 16 | (info->var.hsync_len - 1)); in sstfb_set_par()
/Linux-v5.10/drivers/gpu/drm/
Ddrm_modes.c1196 MODE_STATUS(HSYNC),

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