Searched refs:HSW_TVIDEO_DIP_GCP (Results 1 – 3 of 3) sorted by relevance
995 reg = HSW_TVIDEO_DIP_GCP(crtc_state->cpu_transcoder); in intel_hdmi_set_gcp_infoframe()1020 reg = HSW_TVIDEO_DIP_GCP(crtc_state->cpu_transcoder); in intel_hdmi_read_gcp_infoframe()
3334 MMIO_D(HSW_TVIDEO_DIP_GCP(TRANSCODER_A), D_BXT); in init_bxt_mmio_info()3335 MMIO_D(HSW_TVIDEO_DIP_GCP(TRANSCODER_B), D_BXT); in init_bxt_mmio_info()3336 MMIO_D(HSW_TVIDEO_DIP_GCP(TRANSCODER_C), D_BXT); in init_bxt_mmio_info()
8601 #define HSW_TVIDEO_DIP_GCP(trans) _MMIO_TRANS2(trans, _HSW_VIDEO_DIP_GCP_A) macro
