Searched refs:HHI_VIID_CLK_CNTL (Results 1 – 8 of 8) sorted by relevance
| /Linux-v5.10/drivers/gpu/drm/meson/ |
| D | meson_vclk.c | 60 #define HHI_VIID_CLK_CNTL 0x12c /* 0x4b offset in data sheet */ macro
293 regmap_update_bits(priv->hhi, HHI_VIID_CLK_CNTL, VCLK2_EN, 0); in meson_venci_cvbs_clock_config()
304 regmap_update_bits(priv->hhi, HHI_VIID_CLK_CNTL, in meson_venci_cvbs_clock_config()
307 regmap_update_bits(priv->hhi, HHI_VIID_CLK_CNTL, in meson_venci_cvbs_clock_config()
311 regmap_update_bits(priv->hhi, HHI_VIID_CLK_CNTL, VCLK2_EN, VCLK2_EN); in meson_venci_cvbs_clock_config()
325 regmap_update_bits(priv->hhi, HHI_VIID_CLK_CNTL, in meson_venci_cvbs_clock_config()
329 regmap_update_bits(priv->hhi, HHI_VIID_CLK_CNTL, in meson_venci_cvbs_clock_config()
331 regmap_update_bits(priv->hhi, HHI_VIID_CLK_CNTL, in meson_venci_cvbs_clock_config()
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| /Linux-v5.10/drivers/clk/meson/ |
| D | axg.h | 53 #define HHI_VIID_CLK_CNTL 0x12c macro
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| D | meson8b.h | 28 #define HHI_VIID_CLK_CNTL 0x12c /* 0x4b offset in data sheet */ macro
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| D | gxbb.h | 34 #define HHI_VIID_CLK_CNTL 0x12c /* 0x4b offset in data sheet */ macro
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| D | g12a.h | 55 #define HHI_VIID_CLK_CNTL 0x12C macro
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| D | gxbb.c | 1847 .offset = HHI_VIID_CLK_CNTL,
1943 .offset = HHI_VIID_CLK_CNTL,
2027 .offset = HHI_VIID_CLK_CNTL,
2041 .offset = HHI_VIID_CLK_CNTL,
2055 .offset = HHI_VIID_CLK_CNTL,
2069 .offset = HHI_VIID_CLK_CNTL,
2083 .offset = HHI_VIID_CLK_CNTL,
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| D | g12a.c | 3156 .offset = HHI_VIID_CLK_CNTL,
3247 .offset = HHI_VIID_CLK_CNTL,
3331 .offset = HHI_VIID_CLK_CNTL,
3345 .offset = HHI_VIID_CLK_CNTL,
3359 .offset = HHI_VIID_CLK_CNTL,
3373 .offset = HHI_VIID_CLK_CNTL,
3387 .offset = HHI_VIID_CLK_CNTL,
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| D | meson8b.c | 1361 .offset = HHI_VIID_CLK_CNTL,
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