Home
last modified time | relevance | path

Searched refs:HHI_HDMI_CLK_CNTL (Results 1 – 8 of 8) sorted by relevance

/Linux-v5.10/drivers/gpu/drm/meson/
Dmeson_vclk.c89 #define HHI_HDMI_CLK_CNTL 0x1cc /* 0x73 offset in data sheet */ macro
817 regmap_update_bits(priv->hhi, HHI_HDMI_CLK_CNTL, in meson_vclk_set()
819 regmap_update_bits(priv->hhi, HHI_HDMI_CLK_CNTL, in meson_vclk_set()
821 regmap_update_bits(priv->hhi, HHI_HDMI_CLK_CNTL, in meson_vclk_set()
898 regmap_update_bits(priv->hhi, HHI_HDMI_CLK_CNTL, in meson_vclk_set()
907 regmap_update_bits(priv->hhi, HHI_HDMI_CLK_CNTL, in meson_vclk_set()
916 regmap_update_bits(priv->hhi, HHI_HDMI_CLK_CNTL, in meson_vclk_set()
925 regmap_update_bits(priv->hhi, HHI_HDMI_CLK_CNTL, in meson_vclk_set()
934 regmap_update_bits(priv->hhi, HHI_HDMI_CLK_CNTL, in meson_vclk_set()
Dmeson_dw_hdmi.c108 #define HHI_HDMI_CLK_CNTL 0x1cc /* 0x73 */ macro
442 regmap_update_bits(priv->hhi, HHI_HDMI_CLK_CNTL, 0xffff, 0x100); in dw_hdmi_phy_init()
908 regmap_update_bits(priv->hhi, HHI_HDMI_CLK_CNTL, 0xffff, 0x100); in meson_dw_hdmi_init()
/Linux-v5.10/drivers/clk/meson/
Dmeson8b.h45 #define HHI_HDMI_CLK_CNTL 0x1cc /* 0x73 offset in data sheet */ macro
Dgxbb.h57 #define HHI_HDMI_CLK_CNTL 0x1CC /* 0x73 offset in data sheet */ macro
Dg12a.h74 #define HHI_HDMI_CLK_CNTL 0x1CC macro
Dgxbb.c2278 .offset = HHI_HDMI_CLK_CNTL,
2373 .offset = HHI_HDMI_CLK_CNTL,
2389 .offset = HHI_HDMI_CLK_CNTL,
2404 .offset = HHI_HDMI_CLK_CNTL,
Dmeson8b.c1645 .offset = HHI_HDMI_CLK_CNTL,
1746 .offset = HHI_HDMI_CLK_CNTL,
1767 .offset = HHI_HDMI_CLK_CNTL,
1784 .offset = HHI_HDMI_CLK_CNTL,
Dg12a.c3582 .offset = HHI_HDMI_CLK_CNTL,
3671 .offset = HHI_HDMI_CLK_CNTL,
3687 .offset = HHI_HDMI_CLK_CNTL,
3702 .offset = HHI_HDMI_CLK_CNTL,