Searched refs:GEN8_3LVL_PDPES (Results 1 – 8 of 8) sorted by relevance
134 #define GVT_RING_CTX_NR_PDPS GEN8_3LVL_PDPES
158 u64 i915_context_pdps[GEN8_3LVL_PDPES];
1254 for (i = 0; i < GEN8_3LVL_PDPES; i++) { in i915_context_ppgtt_root_restore()1315 for (i = 0; i < GEN8_3LVL_PDPES; i++) { in i915_context_ppgtt_root_save()
898 u64 pdps[GEN8_3LVL_PDPES]; in cmd_pdp_mmio_update_handler()
79 for (i = 0; i < GEN8_3LVL_PDPES; i++) { in gen8_ppgtt_notify_vgt()619 GEM_BUG_ON(gen8_pd_top_count(vm) != GEN8_3LVL_PDPES); in gen8_preallocate_top_level_pdp()621 for (idx = 0; idx < GEN8_3LVL_PDPES; idx++) { in gen8_preallocate_top_level_pdp()
115 #define GEN8_3LVL_PDPES 4 macro
3631 cs = intel_ring_begin(rq, 4 * GEN8_3LVL_PDPES + 2); in emit_pdps()3636 *cs++ = MI_LOAD_REGISTER_IMM(2 * GEN8_3LVL_PDPES) | MI_LRI_FORCE_POSTED; in emit_pdps()3637 for (i = GEN8_3LVL_PDPES; i--; ) { in emit_pdps()
1274 cs = intel_ring_begin(rq, 4 * GEN8_3LVL_PDPES + 2); in emit_ppgtt_update()1278 *cs++ = MI_LOAD_REGISTER_IMM(2 * GEN8_3LVL_PDPES) | MI_LRI_FORCE_POSTED; in emit_ppgtt_update()1279 for (i = GEN8_3LVL_PDPES; i--; ) { in emit_ppgtt_update()
