Searched refs:FW_BLC_SELF_EN (Results 1 – 5 of 5) sorted by relevance
471 if (REG_READ(FW_BLC_SELF) & FW_BLC_SELF_EN) { in cdv_disable_sr()474 REG_WRITE(FW_BLC_SELF, (REG_READ(FW_BLC_SELF) & ~FW_BLC_SELF_EN)); in cdv_disable_sr()534 REG_WRITE(FW_BLC_SELF, FW_BLC_SELF_EN); in cdv_update_wm()
599 #define FW_BLC_SELF_EN (1<<15) macro
372 was_enabled = I915_READ(FW_BLC_SELF) & FW_BLC_SELF_EN; in _intel_set_memory_cxsr()373 I915_WRITE(FW_BLC_SELF, enable ? FW_BLC_SELF_EN : 0); in _intel_set_memory_cxsr()385 was_enabled = I915_READ(FW_BLC_SELF) & FW_BLC_SELF_EN; in _intel_set_memory_cxsr()386 val = enable ? _MASKED_BIT_ENABLE(FW_BLC_SELF_EN) : in _intel_set_memory_cxsr()387 _MASKED_BIT_DISABLE(FW_BLC_SELF_EN); in _intel_set_memory_cxsr()6444 wm->cxsr = I915_READ(FW_BLC_SELF) & FW_BLC_SELF_EN; in g4x_wm_get_hw_state()
2888 #define FW_BLC_SELF_EN (1 << 15) /* 945 only */ macro
158 sr_enabled = intel_de_read(dev_priv, FW_BLC_SELF) & FW_BLC_SELF_EN; in i915_sr_status()
