Searched refs:FIXED_DIV_PLL (Results 1 – 3 of 3) sorted by relevance
175 sysclks[2].flags |= FIXED_DIV_PLL; in c6455_setup_clocks()177 sysclks[3].flags |= FIXED_DIV_PLL; in c6455_setup_clocks()213 sysclks[1].flags |= FIXED_DIV_PLL; in c6457_setup_clocks()215 sysclks[2].flags |= FIXED_DIV_PLL; in c6457_setup_clocks()217 sysclks[3].flags |= FIXED_DIV_PLL; in c6457_setup_clocks()265 sysclks[i].flags |= FIXED_DIV_PLL; in c6472_setup_clocks()269 sysclks[7].flags |= FIXED_DIV_PLL; in c6472_setup_clocks()271 sysclks[8].flags |= FIXED_DIV_PLL; in c6472_setup_clocks()273 sysclks[9].flags |= FIXED_DIV_PLL; in c6472_setup_clocks()312 sysclks[7].flags |= FIXED_DIV_PLL; in c6474_setup_clocks()[all …]
232 if (clk->flags & FIXED_DIV_PLL) { in clk_sysclk_recalc()
100 #define FIXED_DIV_PLL BIT(4) /* fixed divisor from PLL */ macro
