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Searched refs:FIFO (Results 1 – 25 of 143) sorted by relevance

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/Linux-v5.10/drivers/staging/axis-fifo/
DKconfig3 # "Xilinx AXI-Stream FIFO IP core driver"
6 tristate "Xilinx AXI-Stream FIFO IP core driver"
9 This adds support for the Xilinx AXI-Stream FIFO IP core driver.
10 The AXI Streaming FIFO allows memory mapped access to a AXI Streaming
11 interface. The Xilinx AXI-Stream FIFO IP core can be used to interface
Daxis-fifo.txt1 Xilinx AXI-Stream FIFO v4.1 IP core
37 - xlnx,rx-fifo-depth: Depth of RX FIFO in words
45 - xlnx,tx-fifo-depth: Depth of TX FIFO in words
51 - xlnx,use-rx-data: <0x1> if RX FIFO is enabled, <0x0> otherwise
54 - xlnx,use-tx-data: <0x1> if TX FIFO is enabled, <0x0> otherwise
/Linux-v5.10/Documentation/devicetree/bindings/interrupt-controller/
Dcirrus,clps711x-intc.txt24 12: UTXINT1 UART1 transmit FIFO half empty
25 13: URXINT1 UART1 receive FIFO half full
29 17: SS2RX SSI2 receive FIFO half or greater full
30 18: SS2TX SSI2 transmit FIFO less than half empty
31 28: UTXINT2 UART2 transmit FIFO half empty
32 29: URXINT2 UART2 receive FIFO half full
/Linux-v5.10/drivers/video/fbdev/riva/
Driva_hw.c1371 LOAD_FIXED_STATE(nv4,FIFO); in UpdateFifoState()
1373 chip->Tri05 = (RivaTexturedTriangle05 __iomem *)&(chip->FIFO[0x0000E000/4]); in UpdateFifoState()
1382 LOAD_FIXED_STATE(nv10,FIFO); in UpdateFifoState()
1384 chip->Tri05 = (RivaTexturedTriangle05 __iomem *)&(chip->FIFO[0x0000E000/4]); in UpdateFifoState()
1417 chip->Tri03 = (RivaTexturedTriangle03 __iomem *)&(chip->FIFO[0x0000E000/4]); in LoadStateExt()
1456 chip->Tri03 = (RivaTexturedTriangle03 __iomem *)&(chip->FIFO[0x0000E000/4]); in LoadStateExt()
1461 chip->Tri03 = (RivaTexturedTriangle03 __iomem *)&(chip->FIFO[0x0000E000/4]); in LoadStateExt()
1502 chip->Tri03 = (RivaTexturedTriangle03 __iomem *)&(chip->FIFO[0x0000E000/4]); in LoadStateExt()
1507 chip->Tri03 = (RivaTexturedTriangle03 __iomem *)&(chip->FIFO[0x0000E000/4]); in LoadStateExt()
1665 LOAD_FIXED_STATE(Riva,FIFO); in LoadStateExt()
[all …]
/Linux-v5.10/Documentation/devicetree/bindings/serial/
Dmvebu-uart.txt7 (32 bytes FIFO, no DMA, level interrupts, 8-bit access to the
8 FIFO, baudrate limited to 230400).
10 UART (128 bytes FIFO, DMA, front interrupts, 8-bit or 32-bit
11 accesses to the FIFO, baudrate unlimited by the dividers).
/Linux-v5.10/Documentation/devicetree/bindings/powerpc/fsl/
Dmpc5121-psc.txt8 fsl,mpc5121-immr SoC node. Additionally the PSC FIFO
19 PSC FIFO Controller and b is a field that represents an
42 FIFO Controller
44 PSC FIFO Controller and b is a field that represents an
/Linux-v5.10/Documentation/devicetree/bindings/edac/
Dsocfpga-eccmgr.txt85 Ethernet FIFO ECC
93 NAND FIFO ECC
101 DMA FIFO ECC
109 USB FIFO ECC
117 QSPI FIFO ECC
125 SDMMC FIFO ECC
268 Ethernet FIFO ECC
275 NAND FIFO ECC
282 DMA FIFO ECC
289 USB FIFO ECC
[all …]
/Linux-v5.10/drivers/scsi/aic7xxx/
Daic79xx.seq169 * Since this status did not consume a FIFO, we have to
171 * to this transaction. There are two states that a FIFO still
174 * 1) Configured and draining to the host, with a FIFO handler.
177 * Case 1 can be detected by noticing a non-zero FIFO active
179 * the FIFO to complete the SCB.
182 * pointers for this same context in the other FIFO. So, if
308 * The FIFO use count field is shared with the
583 * Allocate a FIFO for a non-packetized transaction.
585 * can allocate a FIFO for a non-packetized transaction.
589 * Do whatever work is required to free a FIFO.
[all …]
/Linux-v5.10/drivers/video/fbdev/nvidia/
Dnv_local.h92 NV_WR32(&(par)->FIFO[0x0010], 0, (data) << 2); \
96 #define READ_GET(par) (NV_RD32(&(par)->FIFO[0x0011], 0) >> 2)
/Linux-v5.10/arch/powerpc/platforms/512x/
DKconfig14 tristate "MPC512x LocalPlus Bus FIFO driver"
17 Enable support for Freescale MPC512x LocalPlus Bus FIFO (SCLPC).
/Linux-v5.10/arch/sparc/include/asm/
Dfloppy_64.h449 #define FIFO (port + 5) macro
468 sun_pci_fd_out_byte(port, 0x08, FIFO); in sun_pci_fd_sensei()
479 result[i++] = inb(FIFO); in sun_pci_fd_sensei()
514 sun_pci_fd_out_byte(port, 0x07, FIFO); in sun_pci_fd_test_drive()
515 sun_pci_fd_out_byte(port, drive & 0x03, FIFO); in sun_pci_fd_test_drive()
530 #undef FIFO
/Linux-v5.10/Documentation/devicetree/bindings/memory-controllers/
Dath79-ddr-controller.txt4 to flush the FIFO between various devices and the DDR. This is mainly used
5 by the IRQ controller to flush the FIFO before running the interrupt handler
/Linux-v5.10/drivers/edac/
DKconfig429 bool "Altera Ethernet FIFO ECC"
433 Altera Ethernet FIFO Memory for Altera SoCs.
436 bool "Altera NAND FIFO ECC"
440 Altera NAND FIFO Memory for Altera SoCs.
443 bool "Altera DMA FIFO ECC"
447 Altera DMA FIFO Memory for Altera SoCs.
450 bool "Altera USB FIFO ECC"
454 Altera USB FIFO Memory for Altera SoCs.
457 bool "Altera QSPI FIFO ECC"
461 Altera QSPI FIFO Memory for Altera SoCs.
[all …]
/Linux-v5.10/Documentation/devicetree/bindings/dma/
Datmel-dma.txt31 - bit 11-8: FIFO configuration. 0 for half FIFO, 1 for ALAP, 2 for ASAP.
/Linux-v5.10/arch/arm/include/debug/
Dsamsung.S56 @ FIFO enabled...
80 @ FIFO enabled...
/Linux-v5.10/Documentation/devicetree/bindings/spi/
Dqcom,spi-geni-qcom.txt4 (an output FIFO and an input FIFO) for serial peripheral interface (SPI)
/Linux-v5.10/Documentation/devicetree/bindings/c6x/
Demifa.txt22 of the oldest command in the command FIFO. Setting this field to 255
23 disables this feature, thereby allowing old commands to stay in the FIFO
/Linux-v5.10/drivers/char/tpm/
DKconfig48 tristate "TPM Interface Specification 1.2 Interface / TPM 2.0 FIFO Interface"
53 TCG TIS 1.2 TPM specification (TPM1.2) or the TCG PTP FIFO
59 tristate "TPM Interface Specification 1.3 Interface / TPM 2.0 FIFO Interface - (SPI)"
65 TCG TIS 1.3 TPM specification (TPM1.2) or the TCG PTP FIFO
78 tristate "TPM Interface Specification 1.2 Interface / TPM 2.0 FIFO Interface (MMIO - SynQuacer)"
83 TCG TIS 1.2 TPM specification (TPM1.2) or the TCG PTP FIFO
/Linux-v5.10/Documentation/devicetree/bindings/display/tilcdc/
Dpanel.txt10 - fdd: FIFO DMA Request Delay
14 - fifo-th: DMA FIFO threshold
/Linux-v5.10/drivers/staging/media/omap4iss/
DTODO1 * Fix FIFO/buffer overflows and underflows
/Linux-v5.10/sound/soc/cirrus/
DKconfig20 Underflow of internal I2S controller FIFO could confuse the
24 fills FIFO with zeroes.
/Linux-v5.10/Documentation/sound/cards/
Dsb-live-mixer.rst93 The result is forwarded to the ADC capture FIFO (thus to the standard capture
106 The result is forwarded to the ADC capture FIFO (thus to the standard capture
120 The result is forwarded to the ADC capture FIFO (thus to the standard capture
149 of the AC97 codec. The result is forwarded to the ADC capture FIFO (thus to
166 forwarded to the ADC capture FIFO (thus to the standard capture PCM device).
178 forwarded to the ADC capture FIFO (thus to the standard capture PCM device).
189 digital inputs. The result samples are forwarded to the ADC capture FIFO
201 digital inputs. The result samples are forwarded to the ADC capture FIFO
214 capture FIFO (thus to the standard capture PCM device).
Daudigy-mixer.rst84 The result is forwarded to the ADC capture FIFO (thus to the standard capture
97 The result is forwarded to the ADC capture FIFO (thus to the standard capture
105 capture FIFO (device 1 - 16bit/8KHz mono) too without volume control.
110 The result is forwarded to the ADC capture FIFO (thus to the standard capture
123 forwarded to the ADC capture FIFO (thus to the standard capture PCM device).
134 digital inputs. The result samples are forwarded to the ADC capture FIFO
147 capture FIFO (thus to the standard capture PCM device).
160 capture FIFO (thus to the standard capture PCM device).
172 capture FIFO (thus to the standard capture PCM device).
/Linux-v5.10/Documentation/admin-guide/blockdev/
Dfloppy.rst98 you have an FDC without a FIFO (8272A or 82072). 82072A and
100 If you use nodma mode, I suggest you also set the FIFO
104 If you have a FIFO-able FDC, the floppy driver automatically
113 Disables the FIFO entirely. This is needed if you get "Bus
118 Enables the FIFO. (default)
121 Sets the FIFO threshold. This is mostly relevant in DMA
/Linux-v5.10/Documentation/devicetree/bindings/security/tpm/
Dgoogle,cr50.txt5 SPI using the FIFO protocol described in the PTP Spec, section 6.

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