Searched refs:FEATURE_DPM_GFXCLK_MASK (Results 1 – 5 of 5) sorted by relevance
108 data->registry_data.disallowed_features |= FEATURE_DPM_GFXCLK_MASK; in vega20_set_default_registry_data()1788 (feature_mask & FEATURE_DPM_GFXCLK_MASK)) { in vega20_upload_dpm_min_level()1889 (feature_mask & FEATURE_DPM_GFXCLK_MASK)) { in vega20_upload_dpm_max_level()2368 ret = vega20_upload_dpm_min_level(hwmgr, FEATURE_DPM_GFXCLK_MASK | in vega20_force_dpm_highest()2375 ret = vega20_upload_dpm_max_level(hwmgr, FEATURE_DPM_GFXCLK_MASK | in vega20_force_dpm_highest()2410 ret = vega20_upload_dpm_min_level(hwmgr, FEATURE_DPM_GFXCLK_MASK | in vega20_force_dpm_lowest()2417 ret = vega20_upload_dpm_max_level(hwmgr, FEATURE_DPM_GFXCLK_MASK | in vega20_force_dpm_lowest()2468 ret = vega20_upload_dpm_min_level(hwmgr, FEATURE_DPM_GFXCLK_MASK | in vega20_unforce_dpm_levels()2475 ret = vega20_upload_dpm_max_level(hwmgr, FEATURE_DPM_GFXCLK_MASK | in vega20_unforce_dpm_levels()2542 ret = vega20_upload_dpm_min_level(hwmgr, FEATURE_DPM_GFXCLK_MASK); in vega20_force_clock_level()[all …]
103 #define FEATURE_DPM_GFXCLK_MASK (1 << FEATURE_DPM_GFXCLK_BIT ) macro
72 FEATURE_DPM_GFXCLK_MASK | \841 (feature_mask & FEATURE_DPM_GFXCLK_MASK)) { in arcturus_upload_dpm_level()922 FEATURE_DPM_GFXCLK_MASK, in arcturus_force_clk_levels()931 FEATURE_DPM_GFXCLK_MASK, in arcturus_force_clk_levels()
139 #define FEATURE_DPM_GFXCLK_MASK (1 << FEATURE_DPM_GFXCLK_BIT ) macro
129 #define FEATURE_DPM_GFXCLK_MASK (1 << FEATURE_DPM_GFXCLK_BIT ) macro
