Searched refs:EXYNOS5_FSEL_19MHZ2 (Results 1 – 1 of 1) sorted by relevance
32 #define EXYNOS5_FSEL_19MHZ2 0x3 macro240 *reg = EXYNOS5_FSEL_19MHZ2; in exynos5_rate_to_clk()307 case EXYNOS5_FSEL_19MHZ2: in exynos5_usbdrd_pipe3_set_refclk()667 case EXYNOS5_FSEL_19MHZ2: in exynos5420_usbdrd_phy_calibrate()
