| /Linux-v5.10/arch/mips/cavium-octeon/ |
| D | octeon-memcpy.S | 74 #define EXC(inst_reg,addr,handler) \ macro
185 EXC( LOAD t0, UNIT(0)(src), l_exc)
186 EXC( LOAD t1, UNIT(1)(src), l_exc_copy)
187 EXC( LOAD t2, UNIT(2)(src), l_exc_copy)
188 EXC( LOAD t3, UNIT(3)(src), l_exc_copy)
190 EXC( STORE t0, UNIT(0)(dst), s_exc_p16u)
191 EXC( STORE t1, UNIT(1)(dst), s_exc_p15u)
192 EXC( STORE t2, UNIT(2)(dst), s_exc_p14u)
193 EXC( STORE t3, UNIT(3)(dst), s_exc_p13u)
194 EXC( LOAD t0, UNIT(4)(src), l_exc_copy)
[all …]
|
| /Linux-v5.10/arch/alpha/kernel/ |
| D | traps.c | 461 EXC(1b,3b,%1,%0) in do_entUna()
462 EXC(2b,3b,%2,%0) in do_entUna()
477 EXC(1b,3b,%1,%0) in do_entUna()
478 EXC(2b,3b,%2,%0) in do_entUna()
493 EXC(1b,3b,%1,%0) in do_entUna()
494 EXC(2b,3b,%2,%0) in do_entUna()
518 EXC(1b,5b,%2,%0) in do_entUna()
519 EXC(2b,5b,%1,%0) in do_entUna()
520 EXC(3b,5b,$31,%0) in do_entUna()
521 EXC(4b,5b,$31,%0) in do_entUna()
[all …]
|
| /Linux-v5.10/arch/sh/lib/ |
| D | checksum.S | 184 #define EXC(...) \ macro
226 EXC( mov.b @r4+,r1 )
227 EXC( mov.b @r4+,r0 )
229 EXC( mov.b r1,@r5 )
230 EXC( mov.b r0,@(1,r5) )
259 EXC( mov.w @r4+,r0 )
260 EXC( mov.w r0,@r5 )
275 EXC( mov.l @r4+,r0 )
276 EXC( mov.l @r4+,r1 )
278 EXC( mov.l r0,@r5 )
[all …]
|
| /Linux-v5.10/arch/alpha/include/asm/ |
| D | uaccess.h | 79 #define EXC(label,cont,res,err) \ macro
128 EXC(1b,2b,%0,%1) \
135 EXC(1b,2b,%0,%1) \
145 EXC(1b,2b,%0,%1) \
152 EXC(1b,2b,%0,%1) \
168 EXC(1b,3b,%0,%2) \
169 EXC(2b,3b,%0,%2) \
178 EXC(1b,2b,%0,%1) \
224 EXC(1b,2b,$31,%0) \
231 EXC(1b,2b,$31,%0) \
[all …]
|
| D | futex.h | 23 EXC(1b,3b,$31,%1) \
24 EXC(2b,3b,$31,%1) \
84 EXC(1b,3b,$31,%0) in futex_atomic_cmpxchg_inatomic()
85 EXC(2b,3b,$31,%0) in futex_atomic_cmpxchg_inatomic()
|
| /Linux-v5.10/arch/mips/lib/ |
| D | memcpy.S | 115 #define EXC(insn, type, reg, addr, handler) \ macro
149 #define LOAD(reg, addr, handler) EXC(ld, LD_INSN, reg, addr, handler)
150 #define LOADL(reg, addr, handler) EXC(ldl, LD_INSN, reg, addr, handler)
151 #define LOADR(reg, addr, handler) EXC(ldr, LD_INSN, reg, addr, handler)
152 #define STOREL(reg, addr, handler) EXC(sdl, ST_INSN, reg, addr, handler)
153 #define STORER(reg, addr, handler) EXC(sdr, ST_INSN, reg, addr, handler)
154 #define STORE(reg, addr, handler) EXC(sd, ST_INSN, reg, addr, handler)
186 #define LOAD(reg, addr, handler) EXC(lw, LD_INSN, reg, addr, handler)
187 #define LOADL(reg, addr, handler) EXC(lwl, LD_INSN, reg, addr, handler)
188 #define LOADR(reg, addr, handler) EXC(lwr, LD_INSN, reg, addr, handler)
[all …]
|
| D | csum_partial.S | 346 #define EXC(insn, type, reg, addr) \ macro
372 #define LOAD(reg, addr) EXC(ld, LD_INSN, reg, addr)
373 #define LOADBU(reg, addr) EXC(lbu, LD_INSN, reg, addr)
374 #define LOADL(reg, addr) EXC(ldl, LD_INSN, reg, addr)
375 #define LOADR(reg, addr) EXC(ldr, LD_INSN, reg, addr)
376 #define STOREB(reg, addr) EXC(sb, ST_INSN, reg, addr)
377 #define STOREL(reg, addr) EXC(sdl, ST_INSN, reg, addr)
378 #define STORER(reg, addr) EXC(sdr, ST_INSN, reg, addr)
379 #define STORE(reg, addr) EXC(sd, ST_INSN, reg, addr)
392 #define LOAD(reg, addr) EXC(lw, LD_INSN, reg, addr)
[all …]
|
| /Linux-v5.10/arch/x86/lib/ |
| D | checksum_32.S | 263 #define EXC(y...) \ macro
288 EXC(1: movw (%esi), %bx )
290 EXC( movw %bx, (%edi) )
|
| /Linux-v5.10/arch/alpha/lib/ |
| D | csum_partial_copy.c | 48 EXC(1b,2b,%0,%1) \
|
| /Linux-v5.10/arch/m68k/ifpsp060/src/ |
| D | fpsp.S | 16162 # then, the SNAN bit is set in the FPSR EXC byte. If the SNAN trap #
|
