Searched refs:DRAM (Results 1 – 25 of 63) sorted by relevance
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| /Linux-v5.10/Documentation/devicetree/bindings/devfreq/ |
| D | rk3399_dmc.txt | 41 clocks freq is half of DRAM clock), default
58 The controller, pi, PHY and DRAM clock will
72 - rockchip,ddr3_odt_dis_freq : When the DRAM type is DDR3, this parameter defines
75 the ODT on the DRAM side and controller side are
78 - rockchip,ddr3_drv : When the DRAM type is DDR3, this parameter defines
79 the DRAM side driver strength in ohms. Default
82 - rockchip,ddr3_odt : When the DRAM type is DDR3, this parameter defines
83 the DRAM side ODT strength in ohms. Default value
86 - rockchip,phy_ddr3_ca_drv : When the DRAM type is DDR3, this parameter defines
91 - rockchip,phy_ddr3_dq_drv : When the DRAM type is DDR3, this parameter defines
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| D | exynos-bus.txt | 3 The Samsung Exynos SoC has many buses for data transfer between DRAM
106 VDD_MIF |--- DREX 0 (parent device, DRAM EXpress controller)
141 transfer data between DRAM and CPU and uses the VDD_MIF regulator.
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| /Linux-v5.10/drivers/memory/tegra/ |
| D | Kconfig | 16 Tegra20 chips. The EMC controls the external DRAM on the board.
26 Tegra30 chips. The EMC controls the external DRAM on the board.
36 Tegra124 chips. The EMC controls the external DRAM on the board.
50 Tegra210 chips. The EMC controls the external DRAM on the board.
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| /Linux-v5.10/sound/isa/gus/ |
| D | gus_dram.c | 28 outsb(GUSP(gus, DRAM), buffer, size1); in snd_gus_dram_poke()
64 insb(GUSP(gus, DRAM), buffer, size1); in snd_gus_dram_peek()
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| /Linux-v5.10/drivers/memory/samsung/ |
| D | Kconfig | 19 DMC and DRAM. It also supports changing timings of DRAM running with
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| /Linux-v5.10/Documentation/devicetree/bindings/firmware/ |
| D | nvidia,tegra210-bpmp.txt | 6 (suspend to ram), and also offloading DRAM memory clock scaling on
23 - #clock-cells : Should be 1 for platforms where DRAM clock control is
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| /Linux-v5.10/arch/arm/ |
| D | Kconfig-nommu | 14 hex '(S)DRAM Base Address' if SET_MEM_PARAM
18 hex '(S)DRAM SIZE' if SET_MEM_PARAM
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| /Linux-v5.10/arch/arm64/boot/dts/broadcom/stingray/ |
| D | stingray-board-base.dtsi | 22 &memory { /* Default DRAM banks */
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| /Linux-v5.10/arch/arm/mach-lpc32xx/ |
| D | suspend.S | 53 @ This guarantees a small windows where DRAM isn't busy
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| /Linux-v5.10/Documentation/devicetree/bindings/memory-controllers/ |
| D | exynos5422-dmc.txt | 3 The Samsung Exynos5422 SoC has DMC (Dynamic Memory Controller) to which the DRAM
24 - device-handle : phandle of the connected DRAM memory device. For more
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| /Linux-v5.10/Documentation/x86/ |
| D | amd-memory-encryption.rst | 12 automatically decrypted when read from DRAM and encrypted when written to
13 DRAM. SME can therefore be used to protect the contents of DRAM from physical
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| /Linux-v5.10/Documentation/arm/sa1100/ |
| D | lart.rst | 6 applications. It has 32 MB DRAM, 4MB Flash ROM, double RS232 and all
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| /Linux-v5.10/Documentation/devicetree/bindings/nds32/ |
| D | atl2c.txt | 7 reducing DRAM accesses.
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| /Linux-v5.10/Documentation/admin-guide/perf/ |
| D | imx-ddr.rst | 5 There are no performance counters inside the DRAM controller, so performance
30 from different DRAM controller implementations, which is distinguished by quirks
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| /Linux-v5.10/arch/x86/ras/ |
| D | Kconfig | 13 have ECC DIMMs and doesn't have DRAM ECC checking enabled in the BIOS.
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| /Linux-v5.10/Documentation/driver-api/ |
| D | edac.rst | 18 The individual DRAM chips on a memory stick. These devices commonly
69 This is the name of the DRAM signal used to select the DRAM ranks to be
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| /Linux-v5.10/drivers/edac/ |
| D | Kconfig | 81 Support for error detection and correction of DRAM ECC errors on
91 errors into DRAM.
101 which trigger the DRAM ECC Read and Write respectively.
172 E3-1200 based DRAM controllers.
373 tristate "Cavium Octeon DRAM Memory Controller (LMC)"
538 SoCs with ARM DMC-520 DRAM controller.
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| /Linux-v5.10/arch/c6x/kernel/ |
| D | vectors.S | 9 ; At RESET the processor sets up the DRAM timing parameters and
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| /Linux-v5.10/Documentation/devicetree/bindings/arm/ |
| D | fw-cfg.txt | 12 DTB that QEMU places at the bottom of the guest's DRAM.
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| /Linux-v5.10/Documentation/devicetree/bindings/mmc/ |
| D | amlogic,meson-gx.txt | 27 DRAM memory, like on the G12A dedicated SDIO controller.
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| /Linux-v5.10/arch/arm/boot/dts/ |
| D | berlin2cd-valve-steamlink.dts | 43 * DRAM (providing 1.35V). The other regulator on the opposite side
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| D | imx6ul-pico.dtsi | 148 /* DRAM */
156 /* DRAM */
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| /Linux-v5.10/drivers/memory/ |
| D | Kconfig | 11 for DRAM (SDR, DDR), ROM, SRAM and others. The drivers features
65 the DRAM refresh rate. This can be used as an indirect indicator
66 for the DRAM's temperature. Slower refresh rate means cooler RAM,
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| /Linux-v5.10/drivers/powercap/ |
| D | Kconfig | 32 fine grained control. These domains include processor package, DRAM
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| /Linux-v5.10/Documentation/devicetree/bindings/net/ |
| D | marvell-neta-bm.txt | 13 in DRAM. Can be set for each pool (id 0 : 3) separately. The value has
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