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Searched refs:DPU_DEBUG (Results 1 – 12 of 12) sorted by relevance

/Linux-v5.10/drivers/gpu/drm/msm/disp/dpu1/
Ddpu_core_perf.c137 DPU_DEBUG( in _dpu_core_perf_calc_crtc()
183 DPU_DEBUG("crtc:%d bw:%llu ctrl:%d\n", in dpu_core_perf_crtc_check()
192 DPU_DEBUG("calculated bandwidth=%uk\n", bw); in dpu_core_perf_crtc_check()
196 DPU_DEBUG("final threshold bw limit = %d\n", threshold); in dpu_core_perf_crtc_check()
236 DPU_DEBUG("crtc=%d bw=%llu paths:%d\n", in _dpu_core_perf_crtc_update_bus()
283 DPU_DEBUG("Release BW crtc=%d\n", crtc->base.id); in dpu_core_perf_crtc_release_bw()
319 DPU_DEBUG("clk:%llu\n", clk_rate); in _dpu_core_perf_get_core_clk_rate()
349 DPU_DEBUG("crtc:%d stop_req:%d core_clk:%llu\n", in dpu_core_perf_crtc_update()
367 DPU_DEBUG("crtc=%d p=%d new_bw=%llu,old_bw=%llu\n", in dpu_core_perf_crtc_update()
383 DPU_DEBUG("crtc=%d disable\n", crtc->base.id); in dpu_core_perf_crtc_update()
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Ddpu_vbif.c49 DPU_DEBUG("VBIF %d client %d is halted\n", in _dpu_vbif_wait_for_xin_halt()
90 DPU_DEBUG("vbif:%d xin:%d w:%d h:%d fps:%d pps:%llu ot:%u\n", in _dpu_vbif_apply_dynamic_ot_limit()
136 DPU_DEBUG("vbif:%d xin:%d ot_lim:%d\n", in _dpu_vbif_get_ot_limit()
166 DPU_DEBUG("invalid arguments vbif %d mdp %d\n", in dpu_vbif_set_ot_limit()
233 DPU_DEBUG("qos remap not supported\n"); in dpu_vbif_set_qos_remap()
241 DPU_DEBUG("qos tbl not defined\n"); in dpu_vbif_set_qos_remap()
248 DPU_DEBUG("vbif:%d xin:%d lvl:%d/%d\n", in dpu_vbif_set_qos_remap()
Ddpu_rm.c93 DPU_DEBUG("skip mixer %d without pingpong\n", lm->id); in dpu_rm_init()
145 DPU_DEBUG("skip intf %d with type none\n", i); in dpu_rm_init()
226 DPU_DEBUG("lm %d not peer of lm %d\n", peer_cfg->id, in _dpu_rm_check_lm_peer()
260 DPU_DEBUG("lm %d already reserved\n", lm_idx + LM_0); in _dpu_rm_check_lm_and_get_connected_blks()
272 DPU_DEBUG("lm %d pp %d already reserved\n", lm_cfg->id, in _dpu_rm_check_lm_and_get_connected_blks()
288 DPU_DEBUG("lm %d dspp %d already reserved\n", lm_cfg->id, in _dpu_rm_check_lm_and_get_connected_blks()
337 DPU_DEBUG("lm %d not peer of lm %d\n", LM_0 + j, in _dpu_rm_reserve_lms()
355 DPU_DEBUG("unable to find appropriate mixers\n"); in _dpu_rm_reserve_lms()
401 DPU_DEBUG("ctl %d caps 0x%lX\n", rm->ctl_blks[j]->id, features); in _dpu_rm_reserve_ctls()
407 DPU_DEBUG("ctl %d match\n", j + CTL_0); in _dpu_rm_reserve_ctls()
Ddpu_crtc.c59 DPU_DEBUG("\n"); in dpu_crtc_destroy()
89 DPU_DEBUG("format:%s, alpha_en:%u blend_op:0x%x\n", in _dpu_crtc_setup_blend_cfg()
145 DPU_DEBUG("crtc %d stage:%d - plane %d sspp %d fb %d\n", in _dpu_crtc_blend_setup_mixer()
200 DPU_DEBUG("%s\n", dpu_crtc->name); in _dpu_crtc_blend_setup()
227 DPU_DEBUG("lm %d, op_mode 0x%X, ctl %d, flush mask 0x%x\n", in _dpu_crtc_blend_setup()
480 DPU_DEBUG("lm %d, ctl %d, flush mask 0x%x\n", in _dpu_crtc_setup_cp_blocks()
494 DPU_DEBUG("crtc%d -> enable %d, skip atomic_begin\n", in dpu_crtc_atomic_begin()
499 DPU_DEBUG("crtc%d\n", crtc->base.id); in dpu_crtc_atomic_begin()
539 DPU_DEBUG("crtc%d -> enable %d, skip atomic_flush\n", in dpu_crtc_atomic_flush()
544 DPU_DEBUG("crtc%d\n", crtc->base.id); in dpu_crtc_atomic_flush()
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Ddpu_core_irq.c99 DPU_DEBUG("irq_idx=%d ret=%d\n", irq_idx, ret); in _dpu_core_irq_enable()
161 DPU_DEBUG("irq_idx=%d ret=%d\n", irq_idx, ret); in _dpu_core_irq_disable()
225 DPU_DEBUG("[%pS] irq_idx=%d\n", __builtin_return_address(0), irq_idx); in dpu_core_irq_register_callback()
260 DPU_DEBUG("[%pS] irq_idx=%d\n", __builtin_return_address(0), irq_idx); in dpu_core_irq_unregister_callback()
Ddpu_plane.c28 #define DPU_DEBUG_PLANE(pl, fmt, ...) DPU_DEBUG("plane%d " fmt,\
241 DPU_DEBUG("plane%d/%d src_width:%d/%d\n", in _dpu_plane_calc_fill_level()
269 DPU_DEBUG("plane%u: pnum:%d fmt: %4.4s w:%u fl:%u\n", in _dpu_plane_calc_fill_level()
339 DPU_DEBUG("plane%u: pnum:%d fmt: %4.4s rt:%d fl:%u lut:0x%llx\n", in _dpu_plane_set_qos_lut()
392 DPU_DEBUG("plane%u: pnum:%d fmt: %4.4s mode:%d luts[0x%x, 0x%x]\n", in _dpu_plane_set_danger_lut()
436 DPU_DEBUG("plane%u: pnum:%d ds:%d vb:%d pri[0x%x, 0x%x] is_rt:%d\n", in _dpu_plane_set_qos_ctrl()
492 DPU_DEBUG("plane%d pipe:%d vbif:%d xin:%d rt:%d, clk_ctrl:%d\n", in _dpu_plane_set_qos_remap()
1364 DPU_DEBUG("plane:%d img:%dx%d ", in _dpu_plane_set_danger_state()
1367 DPU_DEBUG("src[%d,%d,%d,%d] dst[%d,%d,%d,%d]\n", in _dpu_plane_set_danger_state()
1375 DPU_DEBUG("Inactive plane:%d\n", plane->base.id); in _dpu_plane_set_danger_state()
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Ddpu_kms.h34 #define DPU_DEBUG(fmt, ...) \ macro
Ddpu_kms.c430 DPU_DEBUG("[crtc:%d] not enable\n", crtc->base.id); in dpu_kms_wait_for_commit_done()
435 DPU_DEBUG("[crtc:%d] not active\n", crtc->base.id); in dpu_kms_wait_for_commit_done()
617 DPU_DEBUG("Create plane type %d with features %lx (cur %lx)\n", in _dpu_kms_drm_obj_init()
923 DPU_DEBUG("VBIF NRT is not defined"); in dpu_kms_hw_init()
929 DPU_DEBUG("REG_DMA is not defined"); in dpu_kms_hw_init()
Ddpu_formats.c995 DPU_DEBUG("plane format modifier 0x%llX\n", modifier); in dpu_get_dpu_format_ext()
1005 DPU_DEBUG("found fmt: %4.4s DRM_FORMAT_MOD_QCOM_COMPRESSED\n", in dpu_get_dpu_format_ext()
1024 DPU_DEBUG("fmt %4.4s mod 0x%llX ubwc %d yuv %d\n", in dpu_get_dpu_format_ext()
Ddpu_encoder_phys_cmd.c13 #define DPU_DEBUG_CMDENC(e, fmt, ...) DPU_DEBUG("enc%d intf%d " fmt, \
715 DPU_DEBUG("intf %d\n", p->intf_idx - INTF_0); in dpu_encoder_phys_cmd_init()
Ddpu_encoder.c30 #define DPU_DEBUG_ENC(e, fmt, ...) DPU_DEBUG("enc%d " fmt,\
36 #define DPU_DEBUG_PHYS(p, fmt, ...) DPU_DEBUG("enc%d intf%d pp%d " fmt,\
2048 DPU_DEBUG("\n"); in dpu_encoder_setup_display()
2061 DPU_DEBUG("dsi_info->num_of_h_tiles %d\n", disp_info->num_of_h_tiles); in dpu_encoder_setup_display()
2086 DPU_DEBUG("h_tile_instance %d = %d, split_role %d\n", in dpu_encoder_setup_display()
Ddpu_encoder_phys_vid.c12 #define DPU_DEBUG_VIDENC(e, fmt, ...) DPU_DEBUG("enc%d intf%d " fmt, \