Searched refs:DPLL_MD_UDI_DIVIDER_SHIFT (Results 1 – 3 of 3) sorted by relevance
296 #define DPLL_MD_UDI_DIVIDER_SHIFT 24 macro
783 …REG_WRITE(map->dpll_md, (0 << DPLL_MD_UDI_DIVIDER_SHIFT) | ((sdvo_pixel_multiply - 1) << DPLL_MD_U… in cdv_intel_crtc_mode_set()
3515 #define DPLL_MD_UDI_DIVIDER_SHIFT 24 macro