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Searched refs:DMCU_INTERRUPT_STATUS__VBLANK5_INT_CLEAR__SHIFT (Results 1 – 10 of 10) sorted by relevance

/Linux-v5.10/drivers/gpu/drm/amd/include/asic_reg/dce/
Ddce_6_0_sh_mask.h5808 #define DMCU_INTERRUPT_STATUS__VBLANK5_INT_CLEAR__SHIFT 0x0000001c macro
Ddce_8_0_sh_mask.h7968 #define DMCU_INTERRUPT_STATUS__VBLANK5_INT_CLEAR__SHIFT 0x1c macro
Ddce_10_0_sh_mask.h6996 #define DMCU_INTERRUPT_STATUS__VBLANK5_INT_CLEAR__SHIFT 0x1c macro
Ddce_11_0_sh_mask.h6898 #define DMCU_INTERRUPT_STATUS__VBLANK5_INT_CLEAR__SHIFT 0x1c macro
Ddce_11_2_sh_mask.h7970 #define DMCU_INTERRUPT_STATUS__VBLANK5_INT_CLEAR__SHIFT 0x1c macro
Ddce_12_0_sh_mask.h4864 #define DMCU_INTERRUPT_STATUS__VBLANK5_INT_CLEAR__SHIFT … macro
/Linux-v5.10/drivers/gpu/drm/amd/include/asic_reg/dcn/
Ddcn_2_1_0_sh_mask.h2336 #define DMCU_INTERRUPT_STATUS__VBLANK5_INT_CLEAR__SHIFT … macro
Ddcn_1_0_sh_mask.h3830 #define DMCU_INTERRUPT_STATUS__VBLANK5_INT_CLEAR__SHIFT … macro
Ddcn_3_0_0_sh_mask.h2473 #define DMCU_INTERRUPT_STATUS__VBLANK5_INT_CLEAR__SHIFT … macro
Ddcn_2_0_0_sh_mask.h2604 #define DMCU_INTERRUPT_STATUS__VBLANK5_INT_CLEAR__SHIFT … macro