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Searched refs:DMCU_INTERRUPT_STATUS__VBLANK3_INT_CLEAR_MASK (Results 1 – 10 of 10) sorted by relevance

/Linux-v5.10/drivers/gpu/drm/amd/include/asic_reg/dce/
Ddce_6_0_sh_mask.h5799 #define DMCU_INTERRUPT_STATUS__VBLANK3_INT_CLEAR_MASK 0x04000000L macro
Ddce_8_0_sh_mask.h7959 #define DMCU_INTERRUPT_STATUS__VBLANK3_INT_CLEAR_MASK 0x4000000 macro
Ddce_10_0_sh_mask.h6987 #define DMCU_INTERRUPT_STATUS__VBLANK3_INT_CLEAR_MASK 0x4000000 macro
Ddce_11_0_sh_mask.h6889 #define DMCU_INTERRUPT_STATUS__VBLANK3_INT_CLEAR_MASK 0x4000000 macro
Ddce_11_2_sh_mask.h7961 #define DMCU_INTERRUPT_STATUS__VBLANK3_INT_CLEAR_MASK 0x4000000 macro
Ddce_12_0_sh_mask.h4914 #define DMCU_INTERRUPT_STATUS__VBLANK3_INT_CLEAR_MASK … macro
/Linux-v5.10/drivers/gpu/drm/amd/include/asic_reg/dcn/
Ddcn_2_1_0_sh_mask.h2382 #define DMCU_INTERRUPT_STATUS__VBLANK3_INT_CLEAR_MASK … macro
Ddcn_1_0_sh_mask.h3876 #define DMCU_INTERRUPT_STATUS__VBLANK3_INT_CLEAR_MASK … macro
Ddcn_3_0_0_sh_mask.h2519 #define DMCU_INTERRUPT_STATUS__VBLANK3_INT_CLEAR_MASK … macro
Ddcn_2_0_0_sh_mask.h2650 #define DMCU_INTERRUPT_STATUS__VBLANK3_INT_CLEAR_MASK … macro