Searched refs:DC_STATE_EN_DC3CO (Results 1 – 3 of 3) sorted by relevance
808 mask |= DC_STATE_EN_DC3CO | DC_STATE_EN_UPTO_DC6 in gen9_dc_mask()889 DC_STATE_EN_DC3CO, in sanitize_target_dc_state()910 gen9_set_dc_state(dev_priv, DC_STATE_EN_DC3CO); in tgl_enable_dc3co()1157 return ((intel_de_read(dev_priv, DC_STATE_EN) & DC_STATE_EN_DC3CO) == 0 && in gen9_dc_off_power_well_enabled()1177 if (dev_priv->csr.target_dc_state == DC_STATE_EN_DC3CO) { in gen9_disable_dc_states()1217 case DC_STATE_EN_DC3CO: in gen9_dc_off_power_well_disable()4536 mask |= DC_STATE_EN_DC3CO | DC_STATE_EN_UPTO_DC6; in get_allowed_dc_mask()4539 mask |= DC_STATE_EN_DC3CO | DC_STATE_EN_UPTO_DC5; in get_allowed_dc_mask()
616 intel_display_power_set_target_dc_state(dev_priv, DC_STATE_EN_DC3CO); in tgl_psr2_enable_dc3co()661 if (!(dev_priv->csr.allowed_dc_mask & DC_STATE_EN_DC3CO)) in tgl_dc3co_exitline_compute_config()
10700 #define DC_STATE_EN_DC3CO REG_BIT(30) macro
