Searched refs:DCFCLKState (Results 1 – 3 of 3) sorted by relevance
455 double DCFCLKState[][2]);4755 v->DCFCLKState[i][j] = v->DCFCLKPerState[i]; in dml30_ModeSupportAndSystemConfigurationFull()4819 v->DCFCLKState); in dml30_ModeSupportAndSystemConfigurationFull()4825 if (v->DCFCLKState[i][j] < mode_lib->soc.min_dcfclk) { in dml30_ModeSupportAndSystemConfigurationFull()4826 v->DCFCLKState[i][j] = mode_lib->soc.min_dcfclk; in dml30_ModeSupportAndSystemConfigurationFull()4836 v->ReturnBusWidth * v->DCFCLKState[i][j], in dml30_ModeSupportAndSystemConfigurationFull()4854 …> (v->RoundTripPingLatencyCycles + 32) / v->DCFCLKState[i][j] + ReorderingBytes / v->ReturnBWPerSt… in dml30_ModeSupportAndSystemConfigurationFull()4913 v->DCFCLKState[i][j], in dml30_ModeSupportAndSystemConfigurationFull()5202 v->DCFCLKState[i][j], in dml30_ModeSupportAndSystemConfigurationFull()5356 v->DCFCLK = v->DCFCLKState[v->VoltageLevel][MaximumMPCCombine]; in dml30_ModeSupportAndSystemConfigurationFull()[all …]
414 double DCFCLKState[DC__VOLTAGE_STATES][2]; member
2213 double dcfclk = context->bw_ctx.dml.vba.DCFCLKState[vlevel][context->bw_ctx.dml.vba.maxMpcComb]; in dcn30_calculate_wm_and_dlg()
