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Searched refs:CTRL1 (Results 1 – 10 of 10) sorted by relevance

/Linux-v5.10/drivers/net/ethernet/amd/
Dam79c961a.h70 #define CTRL1 5 macro
Dam79c961a.c392 write_rreg(dev->base_addr, CTRL1, CTRL1_SPND); in am79c961_setmulticastlist()
397 while ((read_rreg(dev->base_addr, CTRL1) & CTRL1_SPND) == 0) { in am79c961_setmulticastlist()
419 write_rreg(dev->base_addr, CTRL1, 0); in am79c961_setmulticastlist()
Damd8111e.h51 #define CTRL1 0x6C /* Control1 register */ macro
Damd8111e.c441 reg_val = readl(mmio + CTRL1); in amd8111e_restart()
443 writel( reg_val| XMTSP_128 | CACHE_ALIGN, mmio + CTRL1 ); in amd8111e_restart()
580 writel(CTRL1_DEFAULT, mmio + CTRL1); in amd8111e_init_hw_default()
/Linux-v5.10/drivers/net/ethernet/intel/ixgb/
Dixgb_hw.c82 IXGB_WRITE_REG(hw, CTRL1, ctrl_reg); in ixgb_mac_reset()
292 IXGB_WRITE_REG_IO(hw, CTRL1, IXGB_CTRL1_EE_RST); in ixgb_init_hw()
294 IXGB_WRITE_REG(hw, CTRL1, IXGB_CTRL1_EE_RST); in ixgb_init_hw()
Dixgb_ethtool.c218 *reg++ = IXGB_READ_REG(hw, CTRL1); /* 1 */ in ixgb_get_regs()
/Linux-v5.10/sound/soc/codecs/
Dak4613.c27 #define CTRL1 0x03 /* Control 1 */ macro
433 snd_soc_component_update_bits(component, CTRL1, FMT_MASK, fmt_ctrl); in ak4613_dai_hw_params()
/Linux-v5.10/Documentation/devicetree/bindings/mfd/
Dsamsung,sec-core.txt39 connected to the ground so the PMIC must manually set PWRHOLD bit in CTRL1
/Linux-v5.10/drivers/regulator/
Dmax77802-regulator.c431 .enable_reg = MAX77802_REG_BUCK ## num ## CTRL1, \
/Linux-v5.10/drivers/media/i2c/
Dov2640.c98 #define CTRL1 0xC3 /* DSP Module enable 1 */ macro