Searched refs:CTRL1 (Results 1 – 10 of 10) sorted by relevance
/Linux-v5.10/drivers/net/ethernet/amd/ |
D | am79c961a.h | 70 #define CTRL1 5 macro
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D | am79c961a.c | 392 write_rreg(dev->base_addr, CTRL1, CTRL1_SPND); in am79c961_setmulticastlist() 397 while ((read_rreg(dev->base_addr, CTRL1) & CTRL1_SPND) == 0) { in am79c961_setmulticastlist() 419 write_rreg(dev->base_addr, CTRL1, 0); in am79c961_setmulticastlist()
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D | amd8111e.h | 51 #define CTRL1 0x6C /* Control1 register */ macro
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D | amd8111e.c | 441 reg_val = readl(mmio + CTRL1); in amd8111e_restart() 443 writel( reg_val| XMTSP_128 | CACHE_ALIGN, mmio + CTRL1 ); in amd8111e_restart() 580 writel(CTRL1_DEFAULT, mmio + CTRL1); in amd8111e_init_hw_default()
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/Linux-v5.10/drivers/net/ethernet/intel/ixgb/ |
D | ixgb_hw.c | 82 IXGB_WRITE_REG(hw, CTRL1, ctrl_reg); in ixgb_mac_reset() 292 IXGB_WRITE_REG_IO(hw, CTRL1, IXGB_CTRL1_EE_RST); in ixgb_init_hw() 294 IXGB_WRITE_REG(hw, CTRL1, IXGB_CTRL1_EE_RST); in ixgb_init_hw()
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D | ixgb_ethtool.c | 218 *reg++ = IXGB_READ_REG(hw, CTRL1); /* 1 */ in ixgb_get_regs()
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/Linux-v5.10/sound/soc/codecs/ |
D | ak4613.c | 27 #define CTRL1 0x03 /* Control 1 */ macro 433 snd_soc_component_update_bits(component, CTRL1, FMT_MASK, fmt_ctrl); in ak4613_dai_hw_params()
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/Linux-v5.10/Documentation/devicetree/bindings/mfd/ |
D | samsung,sec-core.txt | 39 connected to the ground so the PMIC must manually set PWRHOLD bit in CTRL1
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/Linux-v5.10/drivers/regulator/ |
D | max77802-regulator.c | 431 .enable_reg = MAX77802_REG_BUCK ## num ## CTRL1, \
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/Linux-v5.10/drivers/media/i2c/ |
D | ov2640.c | 98 #define CTRL1 0xC3 /* DSP Module enable 1 */ macro
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