Searched refs:CTR (Results 1 – 15 of 15) sorted by relevance
| /Linux-v5.10/arch/x86/crypto/ |
| D | aesni-intel_avx-x86_64.S | 1001 .macro INITIAL_BLOCKS_AVX REP num_initial_blocks T1 T2 T3 T4 T5 CTR XMM1 XMM2 XMM3 XMM4 XMM5 XMM6 X…
1007 vmovdqu CurCount(arg2), \CTR
1012 vpaddd ONE(%rip), \CTR, \CTR # INCR Y0
1013 vmovdqa \CTR, reg_i
1090 vpaddd ONE(%rip), \CTR, \CTR # INCR Y0
1091 vmovdqa \CTR, \XMM1
1094 vpaddd ONE(%rip), \CTR, \CTR # INCR Y0
1095 vmovdqa \CTR, \XMM2
1098 vpaddd ONE(%rip), \CTR, \CTR # INCR Y0
1099 vmovdqa \CTR, \XMM3
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| D | aesni-intel_asm.S | 146 #define CTR %xmm11 macro
2600 movaps IV, CTR
2601 pshufb BSWAP_MASK, CTR
2604 movq CTR, TCTR_LOW
2624 paddq INC, CTR
2628 paddq INC, CTR
2631 movaps CTR, IV
2711 pshufd $0x13, IV, CTR; \
2713 psrad $31, CTR; \
2714 pand GF128MUL_MASK, CTR; \
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| /Linux-v5.10/tools/perf/arch/powerpc/tests/ |
| D | regs_load.S | 38 #define CTR 35 * 8 macro
90 std 4, CTR(3)
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| /Linux-v5.10/arch/arm64/crypto/ |
| D | Kconfig | 87 tristate "AES in ECB/CBC/CTR/XTS modes using ARMv8 Crypto Extensions"
95 tristate "AES in ECB/CBC/CTR/XTS modes using NEON instructions"
121 tristate "AES in ECB/CBC/CTR/XTS modes using bit-sliced NEON algorithm"
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| /Linux-v5.10/Documentation/crypto/ |
| D | architecture.rst | 265 the AES-NI implementation, the CTR mode, the GHASH implementation and
332 During instantiation of the GCM handle, the CTR(AES) and GHASH
333 ciphers are instantiated. The cipher handles for CTR(AES) and GHASH
336 The GCM implementation is responsible to invoke the CTR mode AES and
341 with the instantiated CTR(AES) cipher handle.
343 During instantiation of the CTR(AES) cipher, the CIPHER type
347 That means that the SKCIPHER implementation of CTR(AES) only
348 implements the CTR block chaining mode. After performing the block
351 4. The SKCIPHER of CTR(AES) now invokes the CIPHER API with the AES
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| /Linux-v5.10/arch/arm/crypto/ |
| D | Kconfig | 89 CTR and XTS modes
91 Bit sliced AES gives around 45% speedup on Cortex-A15 for CTR mode
104 Use an implementation of AES in CBC, CTR and XTS modes that uses
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| D | aes-ce-core.S | 437 vst1.8 {q7}, [r5] @ return next CTR value
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| /Linux-v5.10/drivers/crypto/ux500/ |
| D | Kconfig | 15 AES-ECB, CBC and CTR with keys sizes of 128, 192 and 256 bit sizes.
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| /Linux-v5.10/drivers/platform/x86/ |
| D | intel_telemetry_debugfs.c | 76 #define TELEM_CHECK_AND_PARSE_CTRS(EVTID, CTR) { \ argument
78 (CTR) = evtlog[index].telem_evtlog; \
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| D | sony-laptop.c | 711 SNC_HANDLE(CTR, snc_CTR_get, snc_CTR_set, NULL, 1),
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| /Linux-v5.10/arch/powerpc/platforms/8xx/ |
| D | Kconfig | 120 (by not placing conditional branches or branches to LR or CTR
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| /Linux-v5.10/drivers/crypto/ |
| D | Kconfig | 197 As of z196 the CTR mode is hardware accelerated.
212 As of z196 the CTR mode is hardware accelerated for all AES
668 - AES (CBC, CTR, ECB, XTS)
679 - AES (CBC, CTR, ECB, XTS)
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| /Linux-v5.10/crypto/ |
| D | Kconfig | 355 xoring it with a salt. This algorithm is mainly useful for CTR
387 tristate "CTR support"
391 CTR: Counter mode
1118 and GCM drivers, and other CTR or CMAC/XCBC based modes that rely
1160 acceleration for CTR.
1195 for popular block cipher modes ECB, CBC, CTR and XTS is supported.
1841 bool "Enable CTR DRBG"
1845 Enable the CTR DRBG variant as defined in NIST SP800-90A.
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| /Linux-v5.10/Documentation/powerpc/ |
| D | papr_hcalls.rst | 84 | CTR | Y | Loop Counter |
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| D | transactional_memory.rst | 63 Checkpointed registers include all GPRs, FPRs, VRs/VSRs, LR, CCR/CR, CTR, FPCSR
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