Searched refs:CSR0_MISS (Results 1 – 6 of 6) sorted by relevance
22 #define CSR0_MISS 0x1000 /* Missed packet (RC) */ macro
40 #define CSR0_MISS 0x1000 macro
244 …write_rreg (dev->base_addr, CSR0, CSR0_BABL|CSR0_CERR|CSR0_MISS|CSR0_MERR|CSR0_TINT|CSR0_RINT|CSR0… in am79c961_init_for_open()596 CSR0_MERR|CSR0_MISS|CSR0_CERR|CSR0_BABL)); in am79c961_interrupt()606 if (status & CSR0_MISS) { in am79c961_interrupt()
224 #define CSR0_MISS 0x1000 /* missed frame (RC) */ macro672 DREG = CSR0_BABL | CSR0_MERR | CSR0_CERR | CSR0_MISS; in lance_interrupt()742 if (csr0 & CSR0_MISS) dev->stats.rx_errors++; /* Missed a Rx frame. */ in lance_interrupt()
324 #define CSR0_MISS 0x1000 /* missed frame (RC) */ macro941 if (csr0 & CSR0_MISS) dev->stats.rx_errors++; /* Missed a Rx frame. */ in lance_interrupt()951 DREG = CSR0_BABL | CSR0_CERR | CSR0_MISS | CSR0_MERR | in lance_interrupt()
905 if(csr0 & CSR0_MISS) { in ni65_interrupt()1077 if(!(csr0 & CSR0_MISS)) /* don't count errors twice */ in ni65_recv_intr()