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Searched refs:CP_INT_CNTL_RING1__GENERIC0_INT_ENABLE_MASK (Results 1 – 9 of 9) sorted by relevance

/Linux-v5.10/drivers/gpu/drm/amd/include/asic_reg/gca/
Dgfx_6_0_sh_mask.h2392 #define CP_INT_CNTL_RING1__GENERIC0_INT_ENABLE_MASK 0x80000000L macro
Dgfx_7_2_sh_mask.h1217 #define CP_INT_CNTL_RING1__GENERIC0_INT_ENABLE_MASK 0x80000000 macro
Dgfx_8_0_sh_mask.h1551 #define CP_INT_CNTL_RING1__GENERIC0_INT_ENABLE_MASK 0x80000000 macro
Dgfx_8_1_sh_mask.h2075 #define CP_INT_CNTL_RING1__GENERIC0_INT_ENABLE_MASK 0x80000000 macro
/Linux-v5.10/drivers/gpu/drm/amd/include/asic_reg/gc/
Dgc_9_0_sh_mask.h11045 #define CP_INT_CNTL_RING1__GENERIC0_INT_ENABLE_MASK … macro
Dgc_9_1_sh_mask.h12526 #define CP_INT_CNTL_RING1__GENERIC0_INT_ENABLE_MASK … macro
Dgc_9_2_1_sh_mask.h12330 #define CP_INT_CNTL_RING1__GENERIC0_INT_ENABLE_MASK … macro
Dgc_10_3_0_sh_mask.h16241 #define CP_INT_CNTL_RING1__GENERIC0_INT_ENABLE_MASK … macro
Dgc_10_1_0_sh_mask.h17992 #define CP_INT_CNTL_RING1__GENERIC0_INT_ENABLE_MASK … macro