Searched refs:CLR_REG (Results 1 – 5 of 5) sorted by relevance
29 #define CLR_REG 8 macro122 writel_relaxed(BM_C0_EN, priv.base + HW_TCR + CLR_REG); in __asm9260_timer_shutdown()147 priv.base + HW_MCR + CLR_REG); in asm9260_timer_set_periodic()
30 #define CLR_REG 8 macro92 icoll_priv.intr + CLR_REG + HW_ICOLL_INTERRUPTn(d->hwirq)); in icoll_mask_irq()104 icoll_intr_reg(d) + CLR_REG); in asm9260_mask_irq()
36 #define CLR_REG(r) ((r) + 0x04) macro4970 pmx->regs[BANK_DS] + CLR_REG(mux->dinput_reg)); in __atlas7_pmx_pin_input_disable_set()4976 pmx->regs[BANK_DS] + CLR_REG(mux->dinput_val_reg)); in __atlas7_pmx_pin_input_disable_set()4988 pmx->regs[BANK_DS] + CLR_REG(mux->dinput_reg)); in __atlas7_pmx_pin_input_disable_clr()4993 pmx->regs[BANK_DS] + CLR_REG(mux->dinput_val_reg)); in __atlas7_pmx_pin_input_disable_clr()5007 pmx->regs[bank] + CLR_REG(conf->ad_ctrl_reg)); in __atlas7_pmx_pin_ad_sel()5077 pmx->regs[bank] + CLR_REG(conf->mux_reg)); in __atlas7_pmx_pin_enable()5176 writel(pull_info->mask << conf->pupd_bit, CLR_REG(pull_sel_reg)); in altas7_pinctrl_set_pull_sel()5200 writel(ds_info->imval << conf->drvstr_bit, CLR_REG(ds_sel_reg)); in __altas7_pinctrl_set_drive_strength_sel()
48 #define CLR_REG 0x8 macro518 writel_relaxed(val, addr + CLR_REG); in mxs_clr()
60 #define CLR_REG 0x0 macro
