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Searched refs:CLK_TOP_SENINF_SEL (Results 1 – 2 of 2) sorted by relevance

/Linux-v5.10/include/dt-bindings/clock/
Dmt6765-clk.h157 #define CLK_TOP_SENINF_SEL 122 macro
/Linux-v5.10/drivers/clk/mediatek/
Dclk-mt6765.c451 MUX_GATE_CLR_SET_UPD(CLK_TOP_SENINF_SEL, "seninf_sel", seninf_parents,