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Searched refs:CLK_TOP_APLL12_DIV5 (Results 1 – 5 of 5) sorted by relevance

/Linux-v5.10/include/dt-bindings/clock/
Dmt8516-clk.h157 #define CLK_TOP_APLL12_DIV5 125 macro
Dmt6779-clk.h144 #define CLK_TOP_APLL12_DIV5 134 macro
/Linux-v5.10/drivers/clk/mediatek/
Dclk-mt8516.c672 GATE_TOP5(CLK_TOP_APLL12_DIV5, "apll12_div5", "apll12_ck_div5", 6),
Dclk-mt8167.c918 GATE_TOP5(CLK_TOP_APLL12_DIV5, "apll12_div5", "apll12_ck_div5", 6),
Dclk-mt6779.c839 DIV_GATE(CLK_TOP_APLL12_DIV5, "apll12_div5", "i2s5_m_ck_sel",