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Searched refs:CLK_RESET_CCLK_DIVIDER (Results 1 – 4 of 4) sorted by relevance

/Linux-v5.10/arch/arm/mach-tegra/
Dsleep.S23 #define CLK_RESET_CCLK_DIVIDER 0x24 macro
147 str r0, [r5, #CLK_RESET_CCLK_DIVIDER]
Dsleep-tegra20.S31 #define CLK_RESET_CCLK_DIVIDER 0x24 macro
177 str r1, [r0, #CLK_RESET_CCLK_DIVIDER]
264 str r0, [r5, #CLK_RESET_CCLK_DIVIDER]
Dsleep-tegra30.S44 #define CLK_RESET_CCLK_DIVIDER 0x24 macro
327 str r1, [r0, #CLK_RESET_CCLK_DIVIDER]
631 str r0, [r5, #CLK_RESET_CCLK_DIVIDER]
/Linux-v5.10/drivers/clk/tegra/
Dclk-tegra30.c121 #define CLK_RESET_CCLK_DIVIDER 0x24 macro
1156 readl(clk_base + CLK_RESET_CCLK_DIVIDER); in tegra30_cpu_clock_suspend()
1198 clk_base + CLK_RESET_CCLK_DIVIDER); in tegra30_cpu_clock_resume()