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Searched refs:CLK_MM_MDP_TDSHP0 (Results 1 – 6 of 6) sorted by relevance

/Linux-v5.10/drivers/clk/mediatek/
Dclk-mt6765-mm.c36 GATE_MM(CLK_MM_MDP_TDSHP0, "mm_mdp_tdshp0", "mm_ck", 4),
Dclk-mt8173-mm.c56 GATE_MM0(CLK_MM_MDP_TDSHP0, "mm_mdp_tdshp0", "mm_sel", 8),
Dclk-mt2712-mm.c70 GATE_MM0(CLK_MM_MDP_TDSHP0, "mm_mdp_tdshp0", "mm_sel", 8),
/Linux-v5.10/include/dt-bindings/clock/
Dmt6765-clk.h255 #define CLK_MM_MDP_TDSHP0 4 macro
Dmt8173-clk.h257 #define CLK_MM_MDP_TDSHP0 9 macro
Dmt2712-clk.h309 #define CLK_MM_MDP_TDSHP0 8 macro