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Searched refs:CLKID_VCLK_DIV1 (Results 1 – 6 of 6) sorted by relevance

/Linux-v5.10/include/dt-bindings/clock/
Dg12a-clkc.h113 #define CLKID_VCLK_DIV1 148 macro
Dgxbb-clkc.h134 #define CLKID_VCLK_DIV1 185 macro
/Linux-v5.10/drivers/clk/meson/
Dmeson8b.h119 #define CLKID_VCLK_DIV1 140 macro
Dmeson8b.c2856 [CLKID_VCLK_DIV1] = &meson8b_vclk_div1_gate.hw,
3063 [CLKID_VCLK_DIV1] = &meson8b_vclk_div1_gate.hw,
3281 [CLKID_VCLK_DIV1] = &meson8b_vclk_div1_gate.hw,
Dgxbb.c2870 [CLKID_VCLK_DIV1] = &gxbb_vclk_div1.hw,
3081 [CLKID_VCLK_DIV1] = &gxbb_vclk_div1.hw,
Dg12a.c4326 [CLKID_VCLK_DIV1] = &g12a_vclk_div1.hw,
4552 [CLKID_VCLK_DIV1] = &g12a_vclk_div1.hw,
4807 [CLKID_VCLK_DIV1] = &g12a_vclk_div1.hw,