Searched refs:CGU_CLK_GATE (Results 1 – 8 of 8) sorted by relevance
| /Linux-v5.10/drivers/clk/ingenic/ |
| D | jz4770-cgu.c | 168 "h1clk", CGU_CLK_DIV | CGU_CLK_GATE,
185 "c1clk", CGU_CLK_DIV | CGU_CLK_GATE,
205 "mmc0_mux", CGU_CLK_DIV | CGU_CLK_GATE | CGU_CLK_MUX,
212 "mmc1_mux", CGU_CLK_DIV | CGU_CLK_GATE | CGU_CLK_MUX,
219 "mmc2_mux", CGU_CLK_DIV | CGU_CLK_GATE | CGU_CLK_MUX,
226 "cim", CGU_CLK_DIV | CGU_CLK_GATE | CGU_CLK_MUX,
233 "uhc", CGU_CLK_DIV | CGU_CLK_GATE | CGU_CLK_MUX,
240 "gpu", CGU_CLK_DIV | CGU_CLK_GATE | CGU_CLK_MUX,
247 "bch", CGU_CLK_DIV | CGU_CLK_GATE | CGU_CLK_MUX,
254 "lpclk", CGU_CLK_DIV | CGU_CLK_GATE | CGU_CLK_MUX,
[all …]
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| D | jz4780-cgu.c | 389 "vpu", CGU_CLK_MUX | CGU_CLK_DIV | CGU_CLK_GATE,
433 "msc0", CGU_CLK_DIV | CGU_CLK_GATE,
440 "msc1", CGU_CLK_DIV | CGU_CLK_GATE,
447 "msc2", CGU_CLK_DIV | CGU_CLK_GATE,
454 "uhc", CGU_CLK_MUX | CGU_CLK_DIV | CGU_CLK_GATE,
491 "pcm", CGU_CLK_MUX | CGU_CLK_GATE,
498 "gpu", CGU_CLK_MUX | CGU_CLK_DIV | CGU_CLK_GATE,
507 "hdmi", CGU_CLK_MUX | CGU_CLK_DIV | CGU_CLK_GATE,
516 "bch", CGU_CLK_MUX | CGU_CLK_DIV | CGU_CLK_GATE,
531 "rtc_ercs", CGU_CLK_MUX | CGU_CLK_GATE,
[all …]
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| D | x1830-cgu.c | 227 "cpu", CGU_CLK_DIV | CGU_CLK_GATE,
259 "pclk", CGU_CLK_DIV | CGU_CLK_GATE,
266 "ddr", CGU_CLK_MUX | CGU_CLK_DIV | CGU_CLK_GATE,
274 "mac", CGU_CLK_MUX | CGU_CLK_DIV | CGU_CLK_GATE,
283 "lcd", CGU_CLK_MUX | CGU_CLK_DIV | CGU_CLK_GATE,
299 "msc0", CGU_CLK_DIV | CGU_CLK_GATE,
306 "msc1", CGU_CLK_DIV | CGU_CLK_GATE,
339 "rtc_ercs", CGU_CLK_MUX | CGU_CLK_GATE,
348 "emc", CGU_CLK_GATE,
354 "efuse", CGU_CLK_GATE,
[all …]
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| D | jz4725b-cgu.c | 125 "ipu", CGU_CLK_DIV | CGU_CLK_GATE,
135 "lcd", CGU_CLK_DIV | CGU_CLK_GATE,
142 "i2s", CGU_CLK_MUX | CGU_CLK_DIV | CGU_CLK_GATE,
150 "spi", CGU_CLK_MUX | CGU_CLK_DIV | CGU_CLK_GATE,
173 "uart", CGU_CLK_GATE,
179 "dma", CGU_CLK_GATE,
185 "adc", CGU_CLK_GATE,
191 "i2c", CGU_CLK_GATE,
197 "aic", CGU_CLK_GATE,
203 "mmc0", CGU_CLK_GATE,
[all …]
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| D | jz4740-cgu.c | 140 "lcd", CGU_CLK_DIV | CGU_CLK_GATE,
156 "i2s", CGU_CLK_MUX | CGU_CLK_DIV | CGU_CLK_GATE,
164 "spi", CGU_CLK_MUX | CGU_CLK_DIV | CGU_CLK_GATE,
172 "mmc", CGU_CLK_DIV | CGU_CLK_GATE,
179 "uhc", CGU_CLK_DIV | CGU_CLK_GATE,
186 "udc", CGU_CLK_MUX | CGU_CLK_DIV | CGU_CLK_GATE,
196 "uart0", CGU_CLK_GATE,
202 "uart1", CGU_CLK_GATE,
208 "dma", CGU_CLK_GATE,
214 "ipu", CGU_CLK_GATE,
[all …]
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| D | x1000-cgu.c | 253 "cpu", CGU_CLK_DIV | CGU_CLK_GATE,
285 "pclk", CGU_CLK_DIV | CGU_CLK_GATE,
292 "ddr", CGU_CLK_MUX | CGU_CLK_DIV | CGU_CLK_GATE,
300 "mac", CGU_CLK_MUX | CGU_CLK_DIV | CGU_CLK_GATE,
308 "lcd", CGU_CLK_MUX | CGU_CLK_DIV | CGU_CLK_GATE,
322 "msc0", CGU_CLK_DIV | CGU_CLK_GATE,
329 "msc1", CGU_CLK_DIV | CGU_CLK_GATE,
336 "otg", CGU_CLK_DIV | CGU_CLK_GATE | CGU_CLK_MUX,
370 "rtc_ercs", CGU_CLK_MUX | CGU_CLK_GATE,
379 "emc", CGU_CLK_GATE,
[all …]
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| D | cgu.h | 152 CGU_CLK_GATE = BIT(2), enumerator
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| D | cgu.c | 525 if (clk_info->type & CGU_CLK_GATE) { in ingenic_clk_enable()
545 if (clk_info->type & CGU_CLK_GATE) { in ingenic_clk_disable()
560 if (clk_info->type & CGU_CLK_GATE) in ingenic_clk_is_enabled()
693 caps &= ~(CGU_CLK_GATE | CGU_CLK_FIXDIV); in ingenic_register_clock()
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