Searched refs:BRIDGE_PCIEIO_LIMIT0 (Results 1 – 2 of 2) sorted by relevance
88 #define BRIDGE_PCIEIO_LIMIT0 0x40 macro
280 reg = nlm_read_bridge_reg(nbubase, BRIDGE_PCIEIO_LIMIT0 + link); in xlp_config_pci_bswap()