Searched refs:ATOM_PPLL_INVALID (Results 1 – 16 of 16) sorted by relevance
272 if (test_amdgpu_crtc->pll_id != ATOM_PPLL_INVALID) in amdgpu_pll_get_use_mask()300 if (test_amdgpu_crtc->pll_id != ATOM_PPLL_INVALID) in amdgpu_pll_get_shared_dp_ppll()304 return ATOM_PPLL_INVALID; in amdgpu_pll_get_shared_dp_ppll()327 return ATOM_PPLL_INVALID; in amdgpu_pll_get_shared_nondp_ppll()338 if (test_amdgpu_crtc->pll_id != ATOM_PPLL_INVALID) in amdgpu_pll_get_shared_nondp_ppll()346 (test_amdgpu_crtc->pll_id != ATOM_PPLL_INVALID)) in amdgpu_pll_get_shared_nondp_ppll()350 return ATOM_PPLL_INVALID; in amdgpu_pll_get_shared_nondp_ppll()
183 amdgpu_crtc->pll_id = ATOM_PPLL_INVALID; in dce_virtual_crtc_disable()249 amdgpu_crtc->pll_id = ATOM_PPLL_INVALID; in dce_virtual_crtc_init()
2150 return ATOM_PPLL_INVALID; in dce_v8_0_pick_pll()2154 if (pll != ATOM_PPLL_INVALID) in dce_v8_0_pick_pll()2160 if (pll != ATOM_PPLL_INVALID) in dce_v8_0_pick_pll()2173 return ATOM_PPLL_INVALID; in dce_v8_0_pick_pll()2184 return ATOM_PPLL_INVALID; in dce_v8_0_pick_pll()2186 return ATOM_PPLL_INVALID; in dce_v8_0_pick_pll()2515 amdgpu_crtc->pll_id = ATOM_PPLL_INVALID; in dce_v8_0_crtc_disable()2571 if ((amdgpu_crtc->pll_id == ATOM_PPLL_INVALID) && in dce_v8_0_crtc_mode_fixup()2625 amdgpu_crtc->pll_id = ATOM_PPLL_INVALID; in dce_v8_0_crtc_init()
2322 return ATOM_PPLL_INVALID; in dce_v11_0_pick_pll()2329 return ATOM_PPLL_INVALID; in dce_v11_0_pick_pll()2333 if (pll != ATOM_PPLL_INVALID) in dce_v11_0_pick_pll()2339 if (pll != ATOM_PPLL_INVALID) in dce_v11_0_pick_pll()2351 return ATOM_PPLL_INVALID; in dce_v11_0_pick_pll()2360 return ATOM_PPLL_INVALID; in dce_v11_0_pick_pll()2362 return ATOM_PPLL_INVALID; in dce_v11_0_pick_pll()2696 amdgpu_crtc->pll_id = ATOM_PPLL_INVALID; in dce_v11_0_crtc_disable()2771 if ((amdgpu_crtc->pll_id == ATOM_PPLL_INVALID) && in dce_v11_0_crtc_mode_fixup()2845 amdgpu_crtc->pll_id = ATOM_PPLL_INVALID; in dce_v11_0_crtc_init()
2260 return ATOM_PPLL_INVALID; in dce_v10_0_pick_pll()2264 if (pll != ATOM_PPLL_INVALID) in dce_v10_0_pick_pll()2270 if (pll != ATOM_PPLL_INVALID) in dce_v10_0_pick_pll()2283 return ATOM_PPLL_INVALID; in dce_v10_0_pick_pll()2607 amdgpu_crtc->pll_id = ATOM_PPLL_INVALID; in dce_v10_0_crtc_disable()2663 if ((amdgpu_crtc->pll_id == ATOM_PPLL_INVALID) && in dce_v10_0_crtc_mode_fixup()2737 amdgpu_crtc->pll_id = ATOM_PPLL_INVALID; in dce_v10_0_crtc_init()
290 case ATOM_PPLL_INVALID: in amdgpu_atombios_crtc_program_ss()843 case ATOM_PPLL_INVALID: in amdgpu_atombios_crtc_set_pll()
2158 return ATOM_PPLL_INVALID; in dce_v6_0_pick_pll()2164 if (pll != ATOM_PPLL_INVALID) in dce_v6_0_pick_pll()2175 return ATOM_PPLL_INVALID; in dce_v6_0_pick_pll()2496 amdgpu_crtc->pll_id = ATOM_PPLL_INVALID; in dce_v6_0_crtc_disable()2553 if ((amdgpu_crtc->pll_id == ATOM_PPLL_INVALID) && in dce_v6_0_crtc_mode_fixup()2607 amdgpu_crtc->pll_id = ATOM_PPLL_INVALID; in dce_v6_0_crtc_init()
182 *atom_pll_id = ATOM_PPLL_INVALID; in clock_source_id_to_atom()191 *atom_pll_id = ATOM_PPLL_INVALID; in clock_source_id_to_atom()195 *atom_pll_id = ATOM_PPLL_INVALID; in clock_source_id_to_atom()199 *atom_pll_id = ATOM_PPLL_INVALID; in clock_source_id_to_atom()
124 *atom_pll_id = ATOM_PPLL_INVALID; in clock_source_id_to_atom()133 *atom_pll_id = ATOM_PPLL_INVALID; in clock_source_id_to_atom()137 *atom_pll_id = ATOM_PPLL_INVALID; in clock_source_id_to_atom()141 *atom_pll_id = ATOM_PPLL_INVALID; in clock_source_id_to_atom()
412 case ATOM_PPLL_INVALID: in atombios_disable_ss()428 case ATOM_PPLL_INVALID: in atombios_disable_ss()493 case ATOM_PPLL_INVALID: in atombios_crtc_program_ss()512 case ATOM_PPLL_INVALID: in atombios_crtc_program_ss()1089 case ATOM_PPLL_INVALID: in atombios_crtc_set_pll()1746 if (test_radeon_crtc->pll_id != ATOM_PPLL_INVALID) in radeon_get_pll_use_mask()1779 if (test_radeon_crtc->pll_id != ATOM_PPLL_INVALID) in radeon_get_shared_dp_ppll()1783 return ATOM_PPLL_INVALID; in radeon_get_shared_dp_ppll()1807 return ATOM_PPLL_INVALID; in radeon_get_shared_nondp_ppll()1822 if (test_radeon_crtc->pll_id != ATOM_PPLL_INVALID) in radeon_get_shared_nondp_ppll()[all …]
82 #define ATOM_PPLL_INVALID 0xFF macro
201 *atom_pll_id = ATOM_PPLL_INVALID; in clock_source_id_to_atom()
78 ATOM_PPLL_INVALID =0xff, enumerator
99 #define ATOM_PPLL_INVALID 0xFF macro