Searched refs:ASID (Results 1 – 13 of 13) sorted by relevance
| /Linux-v5.10/arch/arm/include/asm/ |
| D | mmu.h | 27 #define ASID(mm) ((unsigned int)((mm)->context.id.counter & ~ASID_MASK)) macro
29 #define ASID(mm) (0) macro
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| D | tlbflush.h | 370 const int asid = ASID(mm); in __local_flush_tlb_mm()
388 const int asid = ASID(mm); in local_flush_tlb_mm()
412 tlb_op(TLB_V7_UIS_ASID, "c8, c3, 2", ASID(mm)); in __flush_tlb_mm()
425 uaddr = (uaddr & PAGE_MASK) | ASID(vma->vm_mm); in __local_flush_tlb_page()
446 uaddr = (uaddr & PAGE_MASK) | ASID(vma->vm_mm); in local_flush_tlb_page()
463 uaddr = (uaddr & PAGE_MASK) | ASID(vma->vm_mm); in __flush_tlb_page()
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| /Linux-v5.10/arch/arm/mm/ |
| D | tlb-v7.S | 38 asid r3, r3 @ mask ASID
47 ALT_SMP(mcr p15, 0, r0, c8, c3, 3) @ TLB invalidate U MVA all ASID (shareable)
76 ALT_SMP(mcr p15, 0, r0, c8, c3, 3) @ TLB invalidate U MVA all ASID (shareable)
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| D | tlb-v6.S | 40 asid r3, r3 @ mask ASID
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| D | Kconfig | 611 This indicates whether the CPU has the ASID register; used to
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| /Linux-v5.10/arch/arm64/include/asm/ |
| D | tlbflush.h | 248 unsigned long asid = __TLBI_VADDR(0, ASID(mm)); in flush_tlb_mm()
259 unsigned long addr = __TLBI_VADDR(uaddr, ASID(vma->vm_mm)); in flush_tlb_page_nosync()
286 unsigned long asid = ASID(vma->vm_mm); in __flush_tlb_range()
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| D | mmu.h | 37 #define ASID(mm) ((mm)->context.id.counter & 0xffff) macro
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| D | mmu_context.h | 200 ttbr = virt_to_phys(mm->pgd) | ASID(mm) << 48; in update_saved_ttbr0()
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| /Linux-v5.10/Documentation/ABI/testing/ |
| D | debugfs-driver-habanalabs | 151 Description: Displays the hop values and physical address for a given ASID
152 and virtual address. The user should write the ASID and VA into
154 e.g. to display info about VA 0x1000 for ASID 1 you need to do:
177 address mappings per ASID
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| /Linux-v5.10/arch/arm64/mm/ |
| D | context.c | 352 unsigned long asid = ASID(mm); in cpu_do_switch_mm()
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| /Linux-v5.10/arch/arm/ |
| D | Kconfig | 938 bool "ARM errata: TLBIASIDIS and TLBIMVAIS operations can broadcast a faulty ASID"
942 r2p0) erratum. A faulty ASID can be sent to the other CPUs for the
947 entries regardless of the ASID.
975 bool "ARM errata: possible faulty MMU translations following an ASID switch"
980 which starts prior to an ASID switch but completes afterwards. This
982 the new ASID. This workaround places two dsb instructions in the mm
983 switching code so that no page table walks can cross the ASID switch.
1039 which sends an IPI to the CPUs that are running the same ASID
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| /Linux-v5.10/Documentation/virt/kvm/ |
| D | amd-memory-encryption.rst | 44 Hence, the ASID for the SEV-enabled guests must be from 1 to a maximum value
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| /Linux-v5.10/arch/arm64/ |
| D | Kconfig | 702 contains data for a non-current ASID. The fix is to
765 bool "Falkor E1003: Incorrect translation due to ASID change"
768 On Falkor v1, an incorrect ASID may be cached in the TLB when ASID
769 and BADDR are changed together in TTBRx_EL1. Since we keep the ASID
1205 zeroed area and reserved ASID. The user access routines
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