Searched refs:ACPILevel (Results  1 – 16 of 16) sorted by relevance
| /Linux-v5.10/drivers/gpu/drm/amd/pm/powerplay/smumgr/ | 
| D | fiji_smumgr.c | 1311 	table->ACPILevel.Flags &= ~PPSMC_SWSTATE_FLAG_DC;  in fiji_populate_smc_acpi_level()1316 		table->ACPILevel.SclkFrequency =  in fiji_populate_smc_acpi_level()
 1320 				table->ACPILevel.SclkFrequency,  in fiji_populate_smc_acpi_level()
 1321 				(uint32_t *)(&table->ACPILevel.MinVoltage), &mvdd);  in fiji_populate_smc_acpi_level()
 1327 		table->ACPILevel.SclkFrequency =  in fiji_populate_smc_acpi_level()
 1329 		table->ACPILevel.MinVoltage =  in fiji_populate_smc_acpi_level()
 1335 			table->ACPILevel.SclkFrequency,  ÷rs);  in fiji_populate_smc_acpi_level()
 1340 	table->ACPILevel.SclkDid = (uint8_t)dividers.pll_post_divider;  in fiji_populate_smc_acpi_level()
 1341 	table->ACPILevel.DisplayWatermark = PPSMC_DISPLAY_WATERMARK_LOW;  in fiji_populate_smc_acpi_level()
 1342 	table->ACPILevel.DeepSleepDivId = 0;  in fiji_populate_smc_acpi_level()
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| D | iceland_smumgr.c | 1438 	table->ACPILevel.Flags &= ~PPSMC_SWSTATE_FLAG_DC;  in iceland_populate_smc_acpi_level()1441 		table->ACPILevel.MinVddc = PP_HOST_TO_SMC_UL(data->acpi_vddc * VOLTAGE_SCALE);  in iceland_populate_smc_acpi_level()
 1443 		table->ACPILevel.MinVddc = PP_HOST_TO_SMC_UL(data->min_vddc_in_pptable * VOLTAGE_SCALE);  in iceland_populate_smc_acpi_level()
 1445 	table->ACPILevel.MinVddcPhases = vddc_phase_shed_control ? 0 : 1;  in iceland_populate_smc_acpi_level()
 1447 	table->ACPILevel.SclkFrequency = atomctrl_get_reference_clock(hwmgr);  in iceland_populate_smc_acpi_level()
 1451 		table->ACPILevel.SclkFrequency,  ÷rs);  in iceland_populate_smc_acpi_level()
 1457 	table->ACPILevel.SclkDid = (uint8_t)dividers.pll_post_divider;  in iceland_populate_smc_acpi_level()
 1458 	table->ACPILevel.DisplayWatermark = PPSMC_DISPLAY_WATERMARK_LOW;  in iceland_populate_smc_acpi_level()
 1459 	table->ACPILevel.DeepSleepDivId = 0;  in iceland_populate_smc_acpi_level()
 1468 	table->ACPILevel.CgSpllFuncCntl = spll_func_cntl;  in iceland_populate_smc_acpi_level()
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| D | ci_smumgr.c | 1391 	table->ACPILevel.Flags &= ~PPSMC_SWSTATE_FLAG_DC;  in ci_populate_smc_acpi_level()1394 		table->ACPILevel.MinVddc = PP_HOST_TO_SMC_UL(data->acpi_vddc * VOLTAGE_SCALE);  in ci_populate_smc_acpi_level()
 1396 		table->ACPILevel.MinVddc = PP_HOST_TO_SMC_UL(data->min_vddc_in_pptable * VOLTAGE_SCALE);  in ci_populate_smc_acpi_level()
 1398 	table->ACPILevel.MinVddcPhases = data->vddc_phase_shed_control ? 0 : 1;  in ci_populate_smc_acpi_level()
 1400 	table->ACPILevel.SclkFrequency = atomctrl_get_reference_clock(hwmgr);  in ci_populate_smc_acpi_level()
 1404 		table->ACPILevel.SclkFrequency,  ÷rs);  in ci_populate_smc_acpi_level()
 1410 	table->ACPILevel.SclkDid = (uint8_t)dividers.pll_post_divider;  in ci_populate_smc_acpi_level()
 1411 	table->ACPILevel.DisplayWatermark = PPSMC_DISPLAY_WATERMARK_LOW;  in ci_populate_smc_acpi_level()
 1412 	table->ACPILevel.DeepSleepDivId = 0;  in ci_populate_smc_acpi_level()
 1421 	table->ACPILevel.CgSpllFuncCntl = spll_func_cntl;  in ci_populate_smc_acpi_level()
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| D | vegam_smumgr.c | 1122 	table->ACPILevel.Flags &= ~PPSMC_SWSTATE_FLAG_DC;  in vegam_populate_smc_acpi_level()1130 			&table->ACPILevel.MinVoltage, &mvdd);  in vegam_populate_smc_acpi_level()
 1137 			&(table->ACPILevel.SclkSetting));  in vegam_populate_smc_acpi_level()
 1142 	table->ACPILevel.DeepSleepDivId = 0;  in vegam_populate_smc_acpi_level()
 1143 	table->ACPILevel.CcPwrDynRm = 0;  in vegam_populate_smc_acpi_level()
 1144 	table->ACPILevel.CcPwrDynRm1 = 0;  in vegam_populate_smc_acpi_level()
 1146 	CONVERT_FROM_HOST_TO_SMC_UL(table->ACPILevel.Flags);  in vegam_populate_smc_acpi_level()
 1147 	CONVERT_FROM_HOST_TO_SMC_UL(table->ACPILevel.MinVoltage);  in vegam_populate_smc_acpi_level()
 1148 	CONVERT_FROM_HOST_TO_SMC_UL(table->ACPILevel.CcPwrDynRm);  in vegam_populate_smc_acpi_level()
 1149 	CONVERT_FROM_HOST_TO_SMC_UL(table->ACPILevel.CcPwrDynRm1);  in vegam_populate_smc_acpi_level()
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| D | tonga_smumgr.c | 1189 	table->ACPILevel.Flags &= ~PPSMC_SWSTATE_FLAG_DC;  in tonga_populate_smc_acpi_level()1191 	table->ACPILevel.MinVoltage =  in tonga_populate_smc_acpi_level()
 1195 	table->ACPILevel.SclkFrequency = atomctrl_get_reference_clock(hwmgr);  in tonga_populate_smc_acpi_level()
 1199 		table->ACPILevel.SclkFrequency,  ÷rs);  in tonga_populate_smc_acpi_level()
 1206 	table->ACPILevel.SclkDid = (uint8_t)dividers.pll_post_divider;  in tonga_populate_smc_acpi_level()
 1207 	table->ACPILevel.DisplayWatermark = PPSMC_DISPLAY_WATERMARK_LOW;  in tonga_populate_smc_acpi_level()
 1208 	table->ACPILevel.DeepSleepDivId = 0;  in tonga_populate_smc_acpi_level()
 1217 	table->ACPILevel.CgSpllFuncCntl = spll_func_cntl;  in tonga_populate_smc_acpi_level()
 1218 	table->ACPILevel.CgSpllFuncCntl2 = spll_func_cntl_2;  in tonga_populate_smc_acpi_level()
 1219 	table->ACPILevel.CgSpllFuncCntl3 = data->clock_registers.vCG_SPLL_FUNC_CNTL_3;  in tonga_populate_smc_acpi_level()
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| D | polaris10_smumgr.c | 1211 	table->ACPILevel.Flags &= ~PPSMC_SWSTATE_FLAG_DC;  in polaris10_populate_smc_acpi_level()1219 			&table->ACPILevel.MinVoltage, &mvdd);  in polaris10_populate_smc_acpi_level()
 1225 	result = polaris10_calculate_sclk_params(hwmgr, sclk_frequency,  &(table->ACPILevel.SclkSetting));  in polaris10_populate_smc_acpi_level()
 1228 	table->ACPILevel.DeepSleepDivId = 0;  in polaris10_populate_smc_acpi_level()
 1229 	table->ACPILevel.CcPwrDynRm = 0;  in polaris10_populate_smc_acpi_level()
 1230 	table->ACPILevel.CcPwrDynRm1 = 0;  in polaris10_populate_smc_acpi_level()
 1232 	CONVERT_FROM_HOST_TO_SMC_UL(table->ACPILevel.Flags);  in polaris10_populate_smc_acpi_level()
 1233 	CONVERT_FROM_HOST_TO_SMC_UL(table->ACPILevel.MinVoltage);  in polaris10_populate_smc_acpi_level()
 1234 	CONVERT_FROM_HOST_TO_SMC_UL(table->ACPILevel.CcPwrDynRm);  in polaris10_populate_smc_acpi_level()
 1235 	CONVERT_FROM_HOST_TO_SMC_UL(table->ACPILevel.CcPwrDynRm1);  in polaris10_populate_smc_acpi_level()
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| /Linux-v5.10/drivers/gpu/drm/radeon/ | 
| D | ci_dpm.c | 2986 	table->ACPILevel.Flags &= ~PPSMC_SWSTATE_FLAG_DC;  in ci_populate_smc_acpi_level()2989 		table->ACPILevel.MinVddc = cpu_to_be32(pi->acpi_vddc * VOLTAGE_SCALE);  in ci_populate_smc_acpi_level()
 2991 		table->ACPILevel.MinVddc = cpu_to_be32(pi->min_vddc_in_pp_table * VOLTAGE_SCALE);  in ci_populate_smc_acpi_level()
 2993 	table->ACPILevel.MinVddcPhases = pi->vddc_phase_shed_control ? 0 : 1;  in ci_populate_smc_acpi_level()
 2995 	table->ACPILevel.SclkFrequency = rdev->clock.spll.reference_freq;  in ci_populate_smc_acpi_level()
 2999 					     table->ACPILevel.SclkFrequency, false, ÷rs);  in ci_populate_smc_acpi_level()
 3003 	table->ACPILevel.SclkDid = (u8)dividers.post_divider;  in ci_populate_smc_acpi_level()
 3004 	table->ACPILevel.DisplayWatermark = PPSMC_DISPLAY_WATERMARK_LOW;  in ci_populate_smc_acpi_level()
 3005 	table->ACPILevel.DeepSleepDivId = 0;  in ci_populate_smc_acpi_level()
 3013 	table->ACPILevel.CgSpllFuncCntl = spll_func_cntl;  in ci_populate_smc_acpi_level()
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| D | smu7_fusion.h | 234     SMU7_Fusion_ACPILevel             ACPILevel;  member
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| D | smu7_discrete.h | 326     SMU7_Discrete_ACPILevel             ACPILevel;  member
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| /Linux-v5.10/drivers/gpu/drm/amd/pm/inc/ | 
| D | smu7_fusion.h | 234     SMU7_Fusion_ACPILevel             ACPILevel;  member
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| D | smu7_discrete.h | 327     SMU7_Discrete_ACPILevel             ACPILevel;  member
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| D | smu71_discrete.h | 274     SMU71_Discrete_ACPILevel             ACPILevel;  member
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| D | smu72_discrete.h | 269 	SMU72_Discrete_ACPILevel            ACPILevel;  member
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| D | smu73_discrete.h | 253     SMU73_Discrete_ACPILevel            ACPILevel;  member
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| D | smu74_discrete.h | 285 	SMU74_Discrete_ACPILevel            ACPILevel;  member
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| D | smu75_discrete.h | 291 	SMU75_Discrete_ACPILevel            ACPILevel;  member
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