| /Linux-v4.19/drivers/gpu/drm/omapdrm/dss/ |
| D | hdmi_wp.c | 23 void hdmi_wp_dump(struct hdmi_wp_data *wp, struct seq_file *s) in hdmi_wp_dump() argument
25 #define DUMPREG(r) seq_printf(s, "%-35s %08x\n", #r, hdmi_read_reg(wp->base, r)) in hdmi_wp_dump()
47 u32 hdmi_wp_get_irqstatus(struct hdmi_wp_data *wp) in hdmi_wp_get_irqstatus() argument
49 return hdmi_read_reg(wp->base, HDMI_WP_IRQSTATUS); in hdmi_wp_get_irqstatus()
52 void hdmi_wp_set_irqstatus(struct hdmi_wp_data *wp, u32 irqstatus) in hdmi_wp_set_irqstatus() argument
54 hdmi_write_reg(wp->base, HDMI_WP_IRQSTATUS, irqstatus); in hdmi_wp_set_irqstatus()
56 hdmi_read_reg(wp->base, HDMI_WP_IRQSTATUS); in hdmi_wp_set_irqstatus()
59 void hdmi_wp_set_irqenable(struct hdmi_wp_data *wp, u32 mask) in hdmi_wp_set_irqenable() argument
61 hdmi_write_reg(wp->base, HDMI_WP_IRQENABLE_SET, mask); in hdmi_wp_set_irqenable()
64 void hdmi_wp_clear_irqenable(struct hdmi_wp_data *wp, u32 mask) in hdmi_wp_clear_irqenable() argument
[all …]
|
| D | hdmi.h | 249 struct hdmi_wp_data *wp; member
271 struct hdmi_wp_data *wp; member
306 int hdmi_wp_video_start(struct hdmi_wp_data *wp);
307 void hdmi_wp_video_stop(struct hdmi_wp_data *wp);
308 void hdmi_wp_dump(struct hdmi_wp_data *wp, struct seq_file *s);
309 u32 hdmi_wp_get_irqstatus(struct hdmi_wp_data *wp);
310 void hdmi_wp_set_irqstatus(struct hdmi_wp_data *wp, u32 irqstatus);
311 void hdmi_wp_set_irqenable(struct hdmi_wp_data *wp, u32 mask);
312 void hdmi_wp_clear_irqenable(struct hdmi_wp_data *wp, u32 mask);
313 int hdmi_wp_set_phy_pwr(struct hdmi_wp_data *wp, enum hdmi_phy_pwr val);
[all …]
|
| D | hdmi5.c | 76 struct hdmi_wp_data *wp = &hdmi->wp; in hdmi_irq_handler() local
79 irqstatus = hdmi_wp_get_irqstatus(wp); in hdmi_irq_handler()
80 hdmi_wp_set_irqstatus(wp, irqstatus); in hdmi_irq_handler()
92 hdmi_wp_set_phy_pwr(wp, HDMI_PHYPWRCMD_OFF); in hdmi_irq_handler()
104 hdmi_wp_set_irqstatus(wp, HDMI_IRQ_LINK_CONNECT | in hdmi_irq_handler()
107 hdmi_wp_set_phy_pwr(wp, HDMI_PHYPWRCMD_LDOON); in hdmi_irq_handler()
112 hdmi_wp_set_phy_pwr(wp, HDMI_PHYPWRCMD_TXON); in hdmi_irq_handler()
114 hdmi_wp_set_phy_pwr(wp, HDMI_PHYPWRCMD_LDOON); in hdmi_irq_handler()
198 hdmi_wp_clear_irqenable(&hdmi->wp, 0xffffffff); in hdmi_power_on_full()
199 hdmi_wp_set_irqstatus(&hdmi->wp, in hdmi_power_on_full()
[all …]
|
| D | hdmi4.c | 75 struct hdmi_wp_data *wp = &hdmi->wp; in hdmi_irq_handler() local
78 irqstatus = hdmi_wp_get_irqstatus(wp); in hdmi_irq_handler()
79 hdmi_wp_set_irqstatus(wp, irqstatus); in hdmi_irq_handler()
89 hdmi_wp_set_phy_pwr(wp, HDMI_PHYPWRCMD_OFF); in hdmi_irq_handler()
91 hdmi_wp_set_irqstatus(wp, HDMI_IRQ_LINK_CONNECT | in hdmi_irq_handler()
94 hdmi_wp_set_phy_pwr(wp, HDMI_PHYPWRCMD_LDOON); in hdmi_irq_handler()
96 hdmi_wp_set_phy_pwr(wp, HDMI_PHYPWRCMD_TXON); in hdmi_irq_handler()
98 hdmi_wp_set_phy_pwr(wp, HDMI_PHYPWRCMD_LDOON); in hdmi_irq_handler()
178 struct hdmi_wp_data *wp = &hdmi->wp; in hdmi_power_on_full() local
187 hdmi_wp_clear_irqenable(wp, ~HDMI_IRQ_CORE); in hdmi_power_on_full()
[all …]
|
| D | hdmi_pll.c | 45 struct hdmi_wp_data *wp = pll->wp; in hdmi_pll_enable() local
53 r = hdmi_wp_set_pll_pwr(wp, HDMI_PLLPWRCMD_BOTHON_ALLCLKS); in hdmi_pll_enable()
63 struct hdmi_wp_data *wp = pll->wp; in hdmi_pll_disable() local
66 hdmi_wp_set_pll_pwr(wp, HDMI_PLLPWRCMD_ALLOFF); in hdmi_pll_disable()
150 if (hpll->wp->version == 4) in hdmi_init_pll_data()
165 struct hdmi_pll_data *pll, struct hdmi_wp_data *wp) in hdmi_pll_init() argument
171 pll->wp = wp; in hdmi_pll_init()
|
| D | hdmi4_cec.c | 176 hdmi_wp_clear_irqenable(core->wp, HDMI_IRQ_CORE); in hdmi_cec_adap_enable()
177 hdmi_wp_set_irqstatus(core->wp, HDMI_IRQ_CORE); in hdmi_cec_adap_enable()
204 hdmi_wp_set_irqenable(core->wp, HDMI_IRQ_CORE); in hdmi_cec_adap_enable()
323 struct hdmi_wp_data *wp) in hdmi4_cec_init() argument
334 core->wp = wp; in hdmi4_cec_init()
340 REG_FLD_MOD(core->wp->base, HDMI_WP_CLK, 0x18, 5, 0); in hdmi4_cec_init()
|
| /Linux-v4.19/drivers/video/fbdev/omap2/omapfb/dss/ |
| D | hdmi_wp.c | 24 void hdmi_wp_dump(struct hdmi_wp_data *wp, struct seq_file *s) in hdmi_wp_dump() argument
26 #define DUMPREG(r) seq_printf(s, "%-35s %08x\n", #r, hdmi_read_reg(wp->base, r)) in hdmi_wp_dump()
48 u32 hdmi_wp_get_irqstatus(struct hdmi_wp_data *wp) in hdmi_wp_get_irqstatus() argument
50 return hdmi_read_reg(wp->base, HDMI_WP_IRQSTATUS); in hdmi_wp_get_irqstatus()
53 void hdmi_wp_set_irqstatus(struct hdmi_wp_data *wp, u32 irqstatus) in hdmi_wp_set_irqstatus() argument
55 hdmi_write_reg(wp->base, HDMI_WP_IRQSTATUS, irqstatus); in hdmi_wp_set_irqstatus()
57 hdmi_read_reg(wp->base, HDMI_WP_IRQSTATUS); in hdmi_wp_set_irqstatus()
60 void hdmi_wp_set_irqenable(struct hdmi_wp_data *wp, u32 mask) in hdmi_wp_set_irqenable() argument
62 hdmi_write_reg(wp->base, HDMI_WP_IRQENABLE_SET, mask); in hdmi_wp_set_irqenable()
65 void hdmi_wp_clear_irqenable(struct hdmi_wp_data *wp, u32 mask) in hdmi_wp_clear_irqenable() argument
[all …]
|
| D | hdmi.h | 244 struct hdmi_wp_data *wp; member
288 int hdmi_wp_video_start(struct hdmi_wp_data *wp);
289 void hdmi_wp_video_stop(struct hdmi_wp_data *wp);
290 void hdmi_wp_dump(struct hdmi_wp_data *wp, struct seq_file *s);
291 u32 hdmi_wp_get_irqstatus(struct hdmi_wp_data *wp);
292 void hdmi_wp_set_irqstatus(struct hdmi_wp_data *wp, u32 irqstatus);
293 void hdmi_wp_set_irqenable(struct hdmi_wp_data *wp, u32 mask);
294 void hdmi_wp_clear_irqenable(struct hdmi_wp_data *wp, u32 mask);
295 int hdmi_wp_set_phy_pwr(struct hdmi_wp_data *wp, enum hdmi_phy_pwr val);
296 int hdmi_wp_set_pll_pwr(struct hdmi_wp_data *wp, enum hdmi_pll_pwr val);
[all …]
|
| D | hdmi5.c | 76 struct hdmi_wp_data *wp = data; in hdmi_irq_handler() local
79 irqstatus = hdmi_wp_get_irqstatus(wp); in hdmi_irq_handler()
80 hdmi_wp_set_irqstatus(wp, irqstatus); in hdmi_irq_handler()
92 hdmi_wp_set_phy_pwr(wp, HDMI_PHYPWRCMD_OFF); in hdmi_irq_handler()
104 hdmi_wp_set_irqstatus(wp, HDMI_IRQ_LINK_CONNECT | in hdmi_irq_handler()
107 hdmi_wp_set_phy_pwr(wp, HDMI_PHYPWRCMD_LDOON); in hdmi_irq_handler()
112 hdmi_wp_set_phy_pwr(wp, HDMI_PHYPWRCMD_TXON); in hdmi_irq_handler()
114 hdmi_wp_set_phy_pwr(wp, HDMI_PHYPWRCMD_LDOON); in hdmi_irq_handler()
189 hdmi_wp_clear_irqenable(&hdmi.wp, 0xffffffff); in hdmi_power_on_full()
190 hdmi_wp_set_irqstatus(&hdmi.wp, in hdmi_power_on_full()
[all …]
|
| D | hdmi4.c | 72 struct hdmi_wp_data *wp = data; in hdmi_irq_handler() local
75 irqstatus = hdmi_wp_get_irqstatus(wp); in hdmi_irq_handler()
76 hdmi_wp_set_irqstatus(wp, irqstatus); in hdmi_irq_handler()
86 hdmi_wp_set_phy_pwr(wp, HDMI_PHYPWRCMD_OFF); in hdmi_irq_handler()
88 hdmi_wp_set_irqstatus(wp, HDMI_IRQ_LINK_CONNECT | in hdmi_irq_handler()
91 hdmi_wp_set_phy_pwr(wp, HDMI_PHYPWRCMD_LDOON); in hdmi_irq_handler()
93 hdmi_wp_set_phy_pwr(wp, HDMI_PHYPWRCMD_TXON); in hdmi_irq_handler()
95 hdmi_wp_set_phy_pwr(wp, HDMI_PHYPWRCMD_LDOON); in hdmi_irq_handler()
159 struct hdmi_wp_data *wp = &hdmi.wp; in hdmi_power_on_full() local
167 hdmi_wp_clear_irqenable(wp, 0xffffffff); in hdmi_power_on_full()
[all …]
|
| D | hdmi_pll.c | 105 struct hdmi_wp_data *wp = pll->wp; in hdmi_pll_enable() local
110 r = hdmi_wp_set_pll_pwr(wp, HDMI_PLLPWRCMD_BOTHON_ALLCLKS); in hdmi_pll_enable()
120 struct hdmi_wp_data *wp = pll->wp; in hdmi_pll_disable() local
122 hdmi_wp_set_pll_pwr(wp, HDMI_PLLPWRCMD_ALLOFF); in hdmi_pll_disable()
223 struct hdmi_wp_data *wp) in hdmi_pll_init() argument
228 pll->wp = wp; in hdmi_pll_init()
|
| /Linux-v4.19/arch/powerpc/math-emu/ |
| D | math_efp.c | 112 u32 wp[2]; member
203 vc.wp[0] = current->thread.evr[fc]; in do_spe_mathemu()
204 vc.wp[1] = regs->gpr[fc]; in do_spe_mathemu()
205 va.wp[0] = current->thread.evr[fa]; in do_spe_mathemu()
206 va.wp[1] = regs->gpr[fa]; in do_spe_mathemu()
207 vb.wp[0] = current->thread.evr[fb]; in do_spe_mathemu()
208 vb.wp[1] = regs->gpr[fb]; in do_spe_mathemu()
213 pr_debug("vc: %08x %08x\n", vc.wp[0], vc.wp[1]); in do_spe_mathemu()
214 pr_debug("va: %08x %08x\n", va.wp[0], va.wp[1]); in do_spe_mathemu()
215 pr_debug("vb: %08x %08x\n", vb.wp[0], vb.wp[1]); in do_spe_mathemu()
[all …]
|
| /Linux-v4.19/tools/testing/selftests/breakpoints/ |
| D | breakpoint_test_arm64.c | 90 static bool set_watchpoint(pid_t pid, int size, int wp) in set_watchpoint() argument
92 const volatile uint8_t *addr = &var[32 + wp]; in set_watchpoint()
121 static bool run_test(int wr_size, int wp_size, int wr, int wp) in run_test() argument
152 if (!set_watchpoint(pid, wp_size, wp)) in run_test()
213 int wr, wp, size; in main() local
224 for (wp = wr - size; wp <= wr + size; wp = wp + size) { in main()
225 result = run_test(size, MIN(size, 8), wr, wp); in main()
226 if ((result && wr == wp) || in main()
227 (!result && wr != wp)) in main()
230 size, wr, wp); in main()
[all …]
|
| /Linux-v4.19/sound/hda/ |
| D | hdac_controller.c | 68 bus->rirb.wp = bus->rirb.rp = 0; in snd_hdac_bus_init_cmd_io()
141 unsigned int wp, rp; in snd_hdac_bus_send_cmd() local
148 wp = snd_hdac_chip_readw(bus, CORBWP); in snd_hdac_bus_send_cmd()
149 if (wp == 0xffff) { in snd_hdac_bus_send_cmd()
154 wp++; in snd_hdac_bus_send_cmd()
155 wp %= AZX_MAX_CORB_ENTRIES; in snd_hdac_bus_send_cmd()
158 if (wp == rp) { in snd_hdac_bus_send_cmd()
165 bus->corb.buf[wp] = cpu_to_le32(val); in snd_hdac_bus_send_cmd()
166 snd_hdac_chip_writew(bus, CORBWP, wp); in snd_hdac_bus_send_cmd()
184 unsigned int rp, wp; in snd_hdac_bus_update_rirb() local
[all …]
|
| D | hdac_bus.c | 131 unsigned int wp; in snd_hdac_bus_queue_event() local
137 wp = (bus->unsol_wp + 1) % HDA_UNSOL_QUEUE_SIZE; in snd_hdac_bus_queue_event()
138 bus->unsol_wp = wp; in snd_hdac_bus_queue_event()
140 wp <<= 1; in snd_hdac_bus_queue_event()
141 bus->unsol_queue[wp] = res; in snd_hdac_bus_queue_event()
142 bus->unsol_queue[wp + 1] = res_ex; in snd_hdac_bus_queue_event()
|
| /Linux-v4.19/lib/mpi/ |
| D | generic_mpih-lshift.c | 41 mpihelp_lshift(mpi_ptr_t wp, mpi_ptr_t up, mpi_size_t usize, unsigned int cnt) in mpihelp_lshift() argument
49 wp += 1; in mpihelp_lshift()
57 wp[i] = (high_limb << sh_1) | (low_limb >> sh_2); in mpihelp_lshift()
60 wp[i] = high_limb << sh_1; in mpihelp_lshift()
|
| D | generic_mpih-rshift.c | 42 mpihelp_rshift(mpi_ptr_t wp, mpi_ptr_t up, mpi_size_t usize, unsigned cnt) in mpihelp_rshift() argument
50 wp -= 1; in mpihelp_rshift()
57 wp[i] = (low_limb >> sh_1) | (high_limb << sh_2); in mpihelp_rshift()
60 wp[i] = low_limb >> sh_1; in mpihelp_rshift()
|
| /Linux-v4.19/arch/ia64/kernel/ |
| D | patch.c | 147 u64 *wp; in ia64_patch_mckinley_e9() local
160 wp = (u64 *) ia64_imva((char *) offp + *offp); in ia64_patch_mckinley_e9()
161 wp[0] = 0x0000000100000011UL; /* nop.m 0; nop.i 0; br.ret.sptk.many b6 */ in ia64_patch_mckinley_e9()
162 wp[1] = 0x0084006880000200UL; in ia64_patch_mckinley_e9()
163 wp[2] = 0x0000000100000000UL; /* nop.m 0; nop.i 0; nop.i 0 */ in ia64_patch_mckinley_e9()
164 wp[3] = 0x0004000000000200UL; in ia64_patch_mckinley_e9()
165 ia64_fc(wp); ia64_fc(wp + 2); in ia64_patch_mckinley_e9()
|
| /Linux-v4.19/lib/raid6/ |
| D | neon.uc | 63 register unative_t wd$$, wq$$, wp$$, w1$$, w2$$;
71 wq$$ = wp$$ = vld1q_u8(&dptr[z0][d+$$*NSIZE]);
74 wp$$ = veorq_u8(wp$$, wd$$);
82 vst1q_u8(&p[d+NSIZE*$$], wp$$);
94 register unative_t wd$$, wq$$, wp$$, w1$$, w2$$;
103 wp$$ = veorq_u8(vld1q_u8(&p[d+$$*NSIZE]), wq$$);
108 wp$$ = veorq_u8(wp$$, wd$$);
150 vst1q_u8(&p[d+NSIZE*$$], wp$$);
|
| D | int.uc | 88 unative_t wd$$, wq$$, wp$$, w1$$, w2$$;
95 wq$$ = wp$$ = *(unative_t *)&dptr[z0][d+$$*NSIZE];
98 wp$$ ^= wd$$;
105 *(unative_t *)&p[d+NSIZE*$$] = wp$$;
117 unative_t wd$$, wq$$, wp$$, w1$$, w2$$;
125 wq$$ = wp$$ = *(unative_t *)&dptr[z0][d+$$*NSIZE];
128 wp$$ ^= wd$$;
142 *(unative_t *)&p[d+NSIZE*$$] ^= wp$$;
|
| D | vpermxor.uc | 49 unative_t wp$$, wq$$, wd$$;
56 wp$$ = wq$$ = *(unative_t *)&dptr[z0][d+$$*NSIZE];
61 wp$$ = vec_xor(wp$$, wd$$);
67 *(unative_t *)&p[d+NSIZE*$$] = wp$$;
|
| /Linux-v4.19/drivers/block/ |
| D | null_blk_zoned.c | 35 zone->start = zone->wp = sector; in null_zone_init()
116 if (sector != zone->wp) { in null_zone_write()
124 zone->wp += nr_sectors; in null_zone_write()
125 if (zone->wp == zone->start + zone->len) in null_zone_write()
142 zone->wp = zone->start; in null_zone_reset()
|
| /Linux-v4.19/sound/pci/lola/ |
| D | lola.c | 102 unsigned int wp = chip->corb.wp + 1; in corb_send_verb() local
103 wp %= LOLA_CORB_ENTRIES; in corb_send_verb()
104 chip->corb.wp = wp; in corb_send_verb()
105 chip->corb.buf[wp * 2] = cpu_to_le32(data); in corb_send_verb()
106 chip->corb.buf[wp * 2 + 1] = cpu_to_le32(extdata); in corb_send_verb()
107 lola_writew(chip, BAR0, CORBWP, wp); in corb_send_verb()
125 unsigned int rp, wp; in lola_update_rirb() local
128 wp = lola_readw(chip, BAR0, RIRBWP); in lola_update_rirb()
129 if (wp == chip->rirb.wp) in lola_update_rirb()
131 chip->rirb.wp = wp; in lola_update_rirb()
[all …]
|
| /Linux-v4.19/arch/arm/kernel/ |
| D | hw_breakpoint.c | 696 struct perf_event *wp, **slots; in watchpoint_handler() local
705 wp = slots[i]; in watchpoint_handler()
707 if (wp == NULL) in watchpoint_handler()
710 info = counter_arch_bp(wp); in watchpoint_handler()
719 info->trigger = wp->attr.bp_addr; in watchpoint_handler()
741 if (!(access & hw_breakpoint_type(wp))) in watchpoint_handler()
750 perf_bp_event(wp, regs); in watchpoint_handler()
757 if (is_default_overflow_handler(wp)) in watchpoint_handler()
758 enable_single_step(wp, instruction_pointer(regs)); in watchpoint_handler()
768 struct perf_event *wp, **slots; in watchpoint_single_step_handler() local
[all …]
|
| /Linux-v4.19/arch/powerpc/platforms/pseries/ |
| D | dtl.c | 78 struct dtl_entry *wp = dtlr->write_ptr; in consume_dtle() local
81 if (!wp) in consume_dtle()
84 *wp = *dtle; in consume_dtle()
91 ++wp; in consume_dtle()
92 if (wp == dtlr->buf_end) in consume_dtle()
93 wp = dtlr->buf; in consume_dtle()
94 dtlr->write_ptr = wp; in consume_dtle()
|
