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Searched refs:wave (Results 1 – 14 of 14) sorted by relevance

/Linux-v4.19/sound/pci/emu10k1/
Demu10k1.c109 struct snd_seq_device *wave = NULL; in snd_card_emu10k1_probe() local
171 sizeof(struct snd_emu10k1_synth_arg), &wave) < 0 || in snd_card_emu10k1_probe()
172 wave == NULL) { in snd_card_emu10k1_probe()
177 arg = SNDRV_SEQ_DEVICE_ARGPTR(wave); in snd_card_emu10k1_probe()
178 strcpy(wave->name, "Emu-10k1 Synth"); in snd_card_emu10k1_probe()
/Linux-v4.19/sound/pci/
Dad1889.c103 struct ad1889_register_state wave; member
203 chip->wave.reg = reg; in ad1889_channel_reset()
385 chip->wave.size = size; in snd_ad1889_playback_prepare()
386 chip->wave.reg = reg; in snd_ad1889_playback_prepare()
387 chip->wave.addr = rt->dma_addr; in snd_ad1889_playback_prepare()
389 ad1889_writew(chip, AD_DS_WSMC, chip->wave.reg); in snd_ad1889_playback_prepare()
395 ad1889_load_wave_buffer_address(chip, chip->wave.addr); in snd_ad1889_playback_prepare()
406 chip->wave.addr, count, size, reg, rt->rate); in snd_ad1889_playback_prepare()
487 chip->wave.reg = wsmc; in snd_ad1889_playback_trigger()
543 if (unlikely(!(chip->wave.reg & AD_DS_WSMC_WAEN))) in snd_ad1889_playback_pointer()
[all …]
/Linux-v4.19/Documentation/devicetree/bindings/rtc/
Dmaxim,ds3231.txt14 - 0: square-wave output on the SQW pin
15 - 1: square-wave output on the 32kHz pin
/Linux-v4.19/Documentation/devicetree/bindings/clock/ti/davinci/
Dpll.txt18 - ti,clkmode-square-wave: Indicates that the the board is supplying a square
19 wave input on the OSCIN pin instead of using a crystal oscillator.
61 ti,clkmode-square-wave;
/Linux-v4.19/sound/pci/au88x0/
Dau88x0.c315 sizeof(snd_vortex_synth_arg_t), &wave) < 0 in snd_vortex_probe()
316 || wave == NULL) { in snd_vortex_probe()
321 arg = SNDRV_SEQ_DEVICE_ARGPTR(wave); in snd_vortex_probe()
322 strcpy(wave->name, "Aureal Synth"); in snd_vortex_probe()
/Linux-v4.19/drivers/gpu/drm/amd/amdgpu/
Damdgpu_debugfs.c623 uint32_t offset, se, sh, cu, wave, simd, data[32]; in amdgpu_debugfs_wave_read() local
633 wave = (*pos & GENMASK_ULL(36, 31)) >> 31; in amdgpu_debugfs_wave_read()
642 adev->gfx.funcs->read_wave_data(adev, simd, wave, data, &x); in amdgpu_debugfs_wave_read()
695 uint32_t offset, se, sh, cu, wave, simd, thread, bank, *data; in amdgpu_debugfs_gpr_read() local
705 wave = (*pos & GENMASK_ULL(43, 36)) >> 36; in amdgpu_debugfs_gpr_read()
720 adev->gfx.funcs->read_wave_vgprs(adev, simd, wave, thread, offset, size>>2, data); in amdgpu_debugfs_gpr_read()
723 adev->gfx.funcs->read_wave_sgprs(adev, simd, wave, offset, size>>2, data); in amdgpu_debugfs_gpr_read()
Dgfx_v6_0.c3006 static uint32_t wave_read_ind(struct amdgpu_device *adev, uint32_t simd, uint32_t wave, uint32_t ad… in wave_read_ind() argument
3009 (wave << SQ_IND_INDEX__WAVE_ID__SHIFT) | in wave_read_ind()
3017 uint32_t wave, uint32_t thread, in wave_read_regs() argument
3021 (wave << SQ_IND_INDEX__WAVE_ID__SHIFT) | in wave_read_regs()
3031 static void gfx_v6_0_read_wave_data(struct amdgpu_device *adev, uint32_t simd, uint32_t wave, uint3… in gfx_v6_0_read_wave_data() argument
3035 dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_STATUS); in gfx_v6_0_read_wave_data()
3036 dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_PC_LO); in gfx_v6_0_read_wave_data()
3037 dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_PC_HI); in gfx_v6_0_read_wave_data()
3038 dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_EXEC_LO); in gfx_v6_0_read_wave_data()
3039 dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_EXEC_HI); in gfx_v6_0_read_wave_data()
[all …]
Dgfx_v7_0.c4215 static uint32_t wave_read_ind(struct amdgpu_device *adev, uint32_t simd, uint32_t wave, uint32_t ad… in wave_read_ind() argument
4218 (wave << SQ_IND_INDEX__WAVE_ID__SHIFT) | in wave_read_ind()
4226 uint32_t wave, uint32_t thread, in wave_read_regs() argument
4230 (wave << SQ_IND_INDEX__WAVE_ID__SHIFT) | in wave_read_regs()
4240 static void gfx_v7_0_read_wave_data(struct amdgpu_device *adev, uint32_t simd, uint32_t wave, uint3… in gfx_v7_0_read_wave_data() argument
4244 dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_STATUS); in gfx_v7_0_read_wave_data()
4245 dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_PC_LO); in gfx_v7_0_read_wave_data()
4246 dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_PC_HI); in gfx_v7_0_read_wave_data()
4247 dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_EXEC_LO); in gfx_v7_0_read_wave_data()
4248 dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_EXEC_HI); in gfx_v7_0_read_wave_data()
[all …]
Dgfx_v9_0.c1089 static uint32_t wave_read_ind(struct amdgpu_device *adev, uint32_t simd, uint32_t wave, uint32_t ad… in wave_read_ind() argument
1092 (wave << SQ_IND_INDEX__WAVE_ID__SHIFT) | in wave_read_ind()
1100 uint32_t wave, uint32_t thread, in wave_read_regs() argument
1104 (wave << SQ_IND_INDEX__WAVE_ID__SHIFT) | in wave_read_regs()
1114 static void gfx_v9_0_read_wave_data(struct amdgpu_device *adev, uint32_t simd, uint32_t wave, uint3… in gfx_v9_0_read_wave_data() argument
1118 dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_STATUS); in gfx_v9_0_read_wave_data()
1119 dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_PC_LO); in gfx_v9_0_read_wave_data()
1120 dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_PC_HI); in gfx_v9_0_read_wave_data()
1121 dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_EXEC_LO); in gfx_v9_0_read_wave_data()
1122 dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_EXEC_HI); in gfx_v9_0_read_wave_data()
[all …]
Dgfx_v8_0.c5487 static uint32_t wave_read_ind(struct amdgpu_device *adev, uint32_t simd, uint32_t wave, uint32_t ad… in wave_read_ind() argument
5490 (wave << SQ_IND_INDEX__WAVE_ID__SHIFT) | in wave_read_ind()
5498 uint32_t wave, uint32_t thread, in wave_read_regs() argument
5502 (wave << SQ_IND_INDEX__WAVE_ID__SHIFT) | in wave_read_regs()
5512 static void gfx_v8_0_read_wave_data(struct amdgpu_device *adev, uint32_t simd, uint32_t wave, uint3… in gfx_v8_0_read_wave_data() argument
5516 dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_STATUS); in gfx_v8_0_read_wave_data()
5517 dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_PC_LO); in gfx_v8_0_read_wave_data()
5518 dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_PC_HI); in gfx_v8_0_read_wave_data()
5519 dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_EXEC_LO); in gfx_v8_0_read_wave_data()
5520 dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_EXEC_HI); in gfx_v8_0_read_wave_data()
[all …]
Damdgpu.h863 …void (*read_wave_data)(struct amdgpu_device *adev, uint32_t simd, uint32_t wave, uint32_t *dst, in…
864 …void (*read_wave_vgprs)(struct amdgpu_device *adev, uint32_t simd, uint32_t wave, uint32_t thread,…
865 …void (*read_wave_sgprs)(struct amdgpu_device *adev, uint32_t simd, uint32_t wave, uint32_t start, …
/Linux-v4.19/drivers/gpu/ipu-v3/
Dipu-dc.c129 int map, int wave, int glue, int sync, int stop) in dc_write_tmpl() argument
138 reg1 = sync | glue << 4 | ++wave << 11 | ((operand << 15) & 0xffff8000); in dc_write_tmpl()
141 reg1 = sync | glue << 4 | ++wave << 11 | ++map << 15 | ((operand << 20) & 0xfff00000); in dc_write_tmpl()
/Linux-v4.19/Documentation/virtual/kvm/
Dtimekeeping.txt95 Mode 3: Square Wave. This generates a high / low square wave. The count
104 which generates sine-like tones by low-pass filtering the square wave output.
242 bit 3 = Square wave interrupt enable
/Linux-v4.19/drivers/media/rc/
DKconfig388 wave and pulses.