Searched refs:vsync_source (Results 1 – 3 of 3) sorted by relevance
200 reg |= (cfg->vsync_source & 0xf) << pp_offset[pp_idx]; in dpu_hw_setup_vsync_source()204 if (cfg->vsync_source >= DPU_VSYNC_SOURCE_WD_TIMER_4 && in dpu_hw_setup_vsync_source()205 cfg->vsync_source <= DPU_VSYNC_SOURCE_WD_TIMER_0) { in dpu_hw_setup_vsync_source()206 switch (cfg->vsync_source) { in dpu_hw_setup_vsync_source()
84 u32 vsync_source; member
721 vsync_cfg.vsync_source = DPU_VSYNC_SOURCE_WD_TIMER_0; in _dpu_encoder_update_vsync_source()723 vsync_cfg.vsync_source = DPU_VSYNC0_SOURCE_GPIO; in _dpu_encoder_update_vsync_source()
