Home
last modified time | relevance | path

Searched refs:vdd_dep_on_mclk (Results 1 – 12 of 12) sorted by relevance

/Linux-v4.19/drivers/gpu/drm/amd/powerplay/hwmgr/
Dprocess_pptables_v1_0.c795 pp_table_information->vdd_dep_on_mclk = NULL; in init_clock_voltage_dependency()
814 &pp_table_information->vdd_dep_on_mclk, mclk_dep_table); in init_clock_voltage_dependency()
833 if (result == 0 && (NULL != pp_table_information->vdd_dep_on_mclk) in init_clock_voltage_dependency()
834 && (0 != pp_table_information->vdd_dep_on_mclk->count)) in init_clock_voltage_dependency()
836 pp_table_information->vdd_dep_on_mclk); in init_clock_voltage_dependency()
1117 kfree(pp_table_information->vdd_dep_on_mclk); in pp_tables_v1_0_uninitialize()
1118 pp_table_information->vdd_dep_on_mclk = NULL; in pp_tables_v1_0_uninitialize()
Dvega10_processpptables.c888 pp_table_info->vdd_dep_on_mclk = NULL; in init_powerplay_extended_tables()
941 &pp_table_info->vdd_dep_on_mclk, in init_powerplay_extended_tables()
985 pp_table_info->vdd_dep_on_mclk && in init_powerplay_extended_tables()
986 pp_table_info->vdd_dep_on_mclk->count) in init_powerplay_extended_tables()
989 pp_table_info->vdd_dep_on_mclk); in init_powerplay_extended_tables()
1170 kfree(pp_table_info->vdd_dep_on_mclk); in vega10_pp_tables_uninitialize()
1171 pp_table_info->vdd_dep_on_mclk = NULL; in vega10_pp_tables_uninitialize()
Dvega10_hwmgr.c311 dep_table[1] = table_info->vdd_dep_on_mclk; in vega10_odn_initial_default_setting()
314 od_table[1] = (struct phm_ppt_v1_clock_voltage_dependency_table *)&odn_table->vdd_dep_on_mclk; in vega10_odn_initial_default_setting()
640 table_info->vdd_dep_on_mclk; in vega10_patch_voltage_dependency_tables_with_lookup_table()
747 table_info->vdd_dep_on_mclk; in vega10_set_private_data_based_on_pptable()
1135 table_info->vdd_dep_on_mclk, in vega10_construct_voltage_tables()
1144 table_info->vdd_dep_on_mclk, in vega10_construct_voltage_tables()
1275 table_info->vdd_dep_on_mclk; in vega10_setup_default_dpm_tables()
1729 &data->odn_dpm_table.vdd_dep_on_mclk; in vega10_populate_single_memory_level()
1731 dep_on_mclk = table_info->vdd_dep_on_mclk; in vega10_populate_single_memory_level()
2425 dep_table = table_info->vdd_dep_on_mclk; in vega10_check_dpm_table_updated()
[all …]
Dsmu10_hwmgr.h202 struct smu10_voltage_dependency_table *vdd_dep_on_mclk; member
Dsmu10_hwmgr.c437 smu10_get_clock_voltage_dependency_table(hwmgr, &pinfo->vdd_dep_on_mclk, in smu10_populate_clock_table()
969 pclk_vol_table = pinfo->vdd_dep_on_mclk; in smu10_get_clock_by_type_with_latency()
1021 pclk_vol_table = pinfo->vdd_dep_on_mclk; in smu10_get_clock_by_type_with_voltage()
Dvega10_hwmgr.h295 struct vega10_odn_clock_voltage_dependency_table vdd_dep_on_mclk; member
Dsmu7_hwmgr.c266 table_info->vdd_dep_on_mclk); in smu7_construct_voltage_tables()
286 table_info->vdd_dep_on_mclk); in smu7_construct_voltage_tables()
766 dep_mclk_table = table_info->vdd_dep_on_mclk; in smu7_setup_dpm_tables_v1()
833 dep_mclk_table = table_info->vdd_dep_on_mclk; in smu7_odn_initial_default_setting()
920 dep_table = table_info->vdd_dep_on_mclk; in smu7_check_dpm_table_updated()
1852 table_info->vdd_dep_on_mclk; in smu7_patch_voltage_dependency_tables_with_lookup_table()
1931 phm_ppt_v1_clock_voltage_dependency_table *mclk_table = pptable_info->vdd_dep_on_mclk; in smu7_calc_voltage_dependency_tables()
2076 table_info->vdd_dep_on_mclk; in smu7_set_private_data_based_on_pptable_v1()
2120 dep_mclk_table = table_info->vdd_dep_on_mclk; in smu7_patch_voltage_workaround()
3219 table_info->vdd_dep_on_mclk; in smu7_get_pp_table_entry_v1()
[all …]
/Linux-v4.19/drivers/gpu/drm/amd/powerplay/smumgr/
Dvegam_smumgr.c989 if (table_info->vdd_dep_on_mclk) { in vegam_populate_single_memory_level()
991 table_info->vdd_dep_on_mclk, clock, in vegam_populate_single_memory_level()
1092 for (i = 0; i < table_info->vdd_dep_on_mclk->count; i++) { in vegam_populate_mvdd_value()
1093 if (mclk <= table_info->vdd_dep_on_mclk->entries[i].clk) { in vegam_populate_mvdd_value()
1098 PP_ASSERT_WITH_CODE(i < table_info->vdd_dep_on_mclk->count, in vegam_populate_mvdd_value()
1163 table_info->vdd_dep_on_mclk, in vegam_populate_smc_acpi_level()
1423 count = (uint8_t)(table_info->vdd_dep_on_mclk->count); in vegam_populate_smc_initial_state()
1425 if (table_info->vdd_dep_on_mclk->entries[level].clk >= in vegam_populate_smc_initial_state()
Dfiji_smumgr.c1188 vdd_dep_table = table_info->vdd_dep_on_mclk; in fiji_populate_single_memory_level()
1294 for (i = 0; i < table_info->vdd_dep_on_mclk->count; i++) { in fiji_populate_mvdd_value()
1295 if (mclk <= table_info->vdd_dep_on_mclk->entries[i].clk) { in fiji_populate_mvdd_value()
1300 PP_ASSERT_WITH_CODE(i < table_info->vdd_dep_on_mclk->count, in fiji_populate_mvdd_value()
1389 table_info->vdd_dep_on_mclk, in fiji_populate_smc_acpi_level()
1663 count = (uint8_t)(table_info->vdd_dep_on_mclk->count); in fiji_populate_smc_initailial_state()
1665 if (table_info->vdd_dep_on_mclk->entries[level].clk >= in fiji_populate_smc_initailial_state()
Dpolaris10_smumgr.c1084 vdd_dep_table = table_info->vdd_dep_on_mclk; in polaris10_populate_single_memory_level()
1182 for (i = 0; i < table_info->vdd_dep_on_mclk->count; i++) { in polaris10_populate_mvdd_value()
1183 if (mclk <= table_info->vdd_dep_on_mclk->entries[i].clk) { in polaris10_populate_mvdd_value()
1188 PP_ASSERT_WITH_CODE(i < table_info->vdd_dep_on_mclk->count, in polaris10_populate_mvdd_value()
1249 table_info->vdd_dep_on_mclk, in polaris10_populate_smc_acpi_level()
1497 count = (uint8_t)(table_info->vdd_dep_on_mclk->count); in polaris10_populate_smc_initailial_state()
1499 if (table_info->vdd_dep_on_mclk->entries[level].clk >= in polaris10_populate_smc_initailial_state()
Dtonga_smumgr.c970 vdd_dep_table = pptable_info->vdd_dep_on_mclk; in tonga_populate_single_memory_level()
1142 for (i = 0; i < table_info->vdd_dep_on_mclk->count; i++) { in tonga_populate_mvdd_value()
1143 if (mclk <= table_info->vdd_dep_on_mclk->entries[i].clk) { in tonga_populate_mvdd_value()
1151 PP_ASSERT_WITH_CODE(i < table_info->vdd_dep_on_mclk->count, in tonga_populate_mvdd_value()
/Linux-v4.19/drivers/gpu/drm/amd/powerplay/inc/
Dhwmgr.h497 struct phm_ppt_v1_clock_voltage_dependency_table *vdd_dep_on_mclk; member
526 struct phm_ppt_v1_clock_voltage_dependency_table *vdd_dep_on_mclk; member