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Searched refs:vclk_div (Results 1 – 6 of 6) sorted by relevance

/Linux-v4.19/drivers/gpu/drm/meson/
Dmeson_vclk.c347 unsigned int vclk_div; member
355 .vclk_div = 1,
363 .vclk_div = 1,
371 .vclk_div = 1,
379 .vclk_div = 1,
387 .vclk_div = 1,
395 .vclk_div = 2,
403 .vclk_div = 1,
631 unsigned int vid_pll_div, unsigned int vclk_div, in meson_vclk_set() argument
686 VCLK_DIV_MASK, vclk_div - 1); in meson_vclk_set()
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/Linux-v4.19/drivers/gpu/drm/radeon/
Dradeon_uvd.c979 unsigned vclk_div, dclk_div, score; in radeon_uvd_calc_upll_dividers() local
990 vclk_div = radeon_uvd_calc_upll_post_div(vco_freq, vclk, in radeon_uvd_calc_upll_dividers()
992 if (vclk_div > pd_max) in radeon_uvd_calc_upll_dividers()
1002 score = vclk - (vco_freq / vclk_div) + dclk - (vco_freq / dclk_div); in radeon_uvd_calc_upll_dividers()
1007 *optimal_vclk_div = vclk_div; in radeon_uvd_calc_upll_dividers()
Drv770.c49 unsigned fb_div = 0, vclk_div = 0, dclk_div = 0; in rv770_set_uvd_clocks() local
69 &fb_div, &vclk_div, &dclk_div); in rv770_set_uvd_clocks()
74 vclk_div -= 1; in rv770_set_uvd_clocks()
97 UPLL_SW_HILEN(vclk_div >> 1) | in rv770_set_uvd_clocks()
98 UPLL_SW_LOLEN((vclk_div >> 1) + (vclk_div & 1)) | in rv770_set_uvd_clocks()
Dr600.c199 unsigned fb_div = 0, ref_div, vclk_div = 0, dclk_div = 0; in r600_set_uvd_clocks() local
228 &fb_div, &vclk_div, &dclk_div); in r600_set_uvd_clocks()
255 UPLL_SW_HILEN(vclk_div >> 1) | in r600_set_uvd_clocks()
256 UPLL_SW_LOLEN((vclk_div >> 1) + (vclk_div & 1)) | in r600_set_uvd_clocks()
Devergreen.c1191 unsigned fb_div = 0, vclk_div = 0, dclk_div = 0; in evergreen_set_uvd_clocks() local
1210 &fb_div, &vclk_div, &dclk_div); in evergreen_set_uvd_clocks()
1249 UPLL_PDIV_A(vclk_div) | UPLL_PDIV_B(dclk_div), in evergreen_set_uvd_clocks()
Dsi.c6995 unsigned fb_div = 0, vclk_div = 0, dclk_div = 0; in si_set_uvd_clocks() local
7013 &fb_div, &vclk_div, &dclk_div); in si_set_uvd_clocks()
7054 UPLL_PDIV_A(vclk_div) | UPLL_PDIV_B(dclk_div), in si_set_uvd_clocks()