Searched refs:vce_level (Results 1 – 13 of 13) sorted by relevance
134 SMU7_Fusion_ExtClkLevel vce_level[SMU7_MAX_LEVELS_VCE]; member
906 pi->vce_level[i].Frequency = cpu_to_be32(table->entries[i].evclk); in kv_populate_vce_table()907 pi->vce_level[i].MinVoltage = cpu_to_be16(table->entries[i].v); in kv_populate_vce_table()909 pi->vce_level[i].ClkBypassCntl = in kv_populate_vce_table()916 pi->vce_level[i].Divider = (u8)dividers.post_div; in kv_populate_vce_table()944 (u8 *)&pi->vce_level, in kv_populate_vce_table()2154 new_rps->evclk = rdev->pm.dpm.vce_states[rdev->pm.dpm.vce_level].evclk; in kv_apply_state_adjust_rules()2155 new_rps->ecclk = rdev->pm.dpm.vce_states[rdev->pm.dpm.vce_level].ecclk; in kv_apply_state_adjust_rules()2181 if (sclk < rdev->pm.dpm.vce_states[rdev->pm.dpm.vce_level].sclk) in kv_apply_state_adjust_rules()2182 sclk = rdev->pm.dpm.vce_states[rdev->pm.dpm.vce_level].sclk; in kv_apply_state_adjust_rules()
1554 new_rps->evclk = rdev->pm.dpm.vce_states[rdev->pm.dpm.vce_level].evclk; in trinity_apply_state_adjust_rules()1555 new_rps->ecclk = rdev->pm.dpm.vce_states[rdev->pm.dpm.vce_level].ecclk; in trinity_apply_state_adjust_rules()1572 if (ps->levels[i].sclk < rdev->pm.dpm.vce_states[rdev->pm.dpm.vce_level].sclk) in trinity_apply_state_adjust_rules()1573 ps->levels[i].sclk = rdev->pm.dpm.vce_states[rdev->pm.dpm.vce_level].sclk; in trinity_apply_state_adjust_rules()
3005 rps->evclk = rdev->pm.dpm.vce_states[rdev->pm.dpm.vce_level].evclk; in si_apply_state_adjust_rules()3006 rps->ecclk = rdev->pm.dpm.vce_states[rdev->pm.dpm.vce_level].ecclk; in si_apply_state_adjust_rules()3095 if (sclk < rdev->pm.dpm.vce_states[rdev->pm.dpm.vce_level].sclk) in si_apply_state_adjust_rules()3096 sclk = rdev->pm.dpm.vce_states[rdev->pm.dpm.vce_level].sclk; in si_apply_state_adjust_rules()3097 if (mclk < rdev->pm.dpm.vce_states[rdev->pm.dpm.vce_level].mclk) in si_apply_state_adjust_rules()3098 mclk = rdev->pm.dpm.vce_states[rdev->pm.dpm.vce_level].mclk; in si_apply_state_adjust_rules()
804 rps->evclk = rdev->pm.dpm.vce_states[rdev->pm.dpm.vce_level].evclk; in ci_apply_state_adjust_rules()805 rps->ecclk = rdev->pm.dpm.vce_states[rdev->pm.dpm.vce_level].ecclk; in ci_apply_state_adjust_rules()847 if (sclk < rdev->pm.dpm.vce_states[rdev->pm.dpm.vce_level].sclk) in ci_apply_state_adjust_rules()848 sclk = rdev->pm.dpm.vce_states[rdev->pm.dpm.vce_level].sclk; in ci_apply_state_adjust_rules()849 if (mclk < rdev->pm.dpm.vce_states[rdev->pm.dpm.vce_level].mclk) in ci_apply_state_adjust_rules()850 mclk = rdev->pm.dpm.vce_states[rdev->pm.dpm.vce_level].mclk; in ci_apply_state_adjust_rules()
1348 enum radeon_vce_level vce_level; member1552 enum radeon_vce_level vce_level; member
1175 rdev->pm.dpm.vce_level = RADEON_VCE_LEVEL_AC_ALL; in radeon_dpm_enable_vce()
160 SMU7_Fusion_ExtClkLevel vce_level[SMU7_MAX_LEVELS_VCE]; member
66 enum amd_vce_level vce_level; member375 enum amd_vce_level vce_level; member
991 pi->vce_level[i].Frequency = cpu_to_be32(table->entries[i].evclk); in kv_populate_vce_table()992 pi->vce_level[i].MinVoltage = cpu_to_be16(table->entries[i].v); in kv_populate_vce_table()994 pi->vce_level[i].ClkBypassCntl = in kv_populate_vce_table()1001 pi->vce_level[i].Divider = (u8)dividers.post_div; in kv_populate_vce_table()1029 (u8 *)&pi->vce_level, in kv_populate_vce_table()2222 new_rps->evclk = adev->pm.dpm.vce_states[adev->pm.dpm.vce_level].evclk; in kv_apply_state_adjust_rules()2223 new_rps->ecclk = adev->pm.dpm.vce_states[adev->pm.dpm.vce_level].ecclk; in kv_apply_state_adjust_rules()2249 if (sclk < adev->pm.dpm.vce_states[adev->pm.dpm.vce_level].sclk) in kv_apply_state_adjust_rules()2250 sclk = adev->pm.dpm.vce_states[adev->pm.dpm.vce_level].sclk; in kv_apply_state_adjust_rules()
936 rps->evclk = adev->pm.dpm.vce_states[adev->pm.dpm.vce_level].evclk; in ci_apply_state_adjust_rules()937 rps->ecclk = adev->pm.dpm.vce_states[adev->pm.dpm.vce_level].ecclk; in ci_apply_state_adjust_rules()985 if (sclk < adev->pm.dpm.vce_states[adev->pm.dpm.vce_level].sclk) in ci_apply_state_adjust_rules()986 sclk = adev->pm.dpm.vce_states[adev->pm.dpm.vce_level].sclk; in ci_apply_state_adjust_rules()987 if (mclk < adev->pm.dpm.vce_states[adev->pm.dpm.vce_level].mclk) in ci_apply_state_adjust_rules()988 mclk = adev->pm.dpm.vce_states[adev->pm.dpm.vce_level].mclk; in ci_apply_state_adjust_rules()
3465 rps->evclk = adev->pm.dpm.vce_states[adev->pm.dpm.vce_level].evclk; in si_apply_state_adjust_rules()3466 rps->ecclk = adev->pm.dpm.vce_states[adev->pm.dpm.vce_level].ecclk; in si_apply_state_adjust_rules()3555 if (sclk < adev->pm.dpm.vce_states[adev->pm.dpm.vce_level].sclk) in si_apply_state_adjust_rules()3556 sclk = adev->pm.dpm.vce_states[adev->pm.dpm.vce_level].sclk; in si_apply_state_adjust_rules()3557 if (mclk < adev->pm.dpm.vce_states[adev->pm.dpm.vce_level].mclk) in si_apply_state_adjust_rules()3558 mclk = adev->pm.dpm.vce_states[adev->pm.dpm.vce_level].mclk; in si_apply_state_adjust_rules()
1749 adev->pm.dpm.vce_level = AMD_VCE_LEVEL_AC_ALL; in amdgpu_dpm_enable_vce()
