Searched refs:v2_1 (Results 1 – 4 of 4) sorted by relevance
167 const struct rlc_firmware_header_v2_1 *v2_1 = in amdgpu_ucode_print_rlc_hdr() local170 le32_to_cpu(v2_1->reg_list_format_direct_reg_list_length)); in amdgpu_ucode_print_rlc_hdr()172 le32_to_cpu(v2_1->save_restore_list_cntl_ucode_ver)); in amdgpu_ucode_print_rlc_hdr()174 le32_to_cpu(v2_1->save_restore_list_cntl_feature_ver)); in amdgpu_ucode_print_rlc_hdr()176 le32_to_cpu(v2_1->save_restore_list_cntl_size_bytes)); in amdgpu_ucode_print_rlc_hdr()178 le32_to_cpu(v2_1->save_restore_list_cntl_offset_bytes)); in amdgpu_ucode_print_rlc_hdr()180 le32_to_cpu(v2_1->save_restore_list_gpm_ucode_ver)); in amdgpu_ucode_print_rlc_hdr()182 le32_to_cpu(v2_1->save_restore_list_gpm_feature_ver)); in amdgpu_ucode_print_rlc_hdr()184 le32_to_cpu(v2_1->save_restore_list_gpm_size_bytes)); in amdgpu_ucode_print_rlc_hdr()186 le32_to_cpu(v2_1->save_restore_list_gpm_offset_bytes)); in amdgpu_ucode_print_rlc_hdr()[all …]
523 SET_DCE_CLOCK_PS_ALLOCATION_V2_1 v2_1; member545 args.v2_1.asParam.ulDCEClkFreq = cpu_to_le32(freq); /* 10kHz units */ in amdgpu_atombios_crtc_set_dce_clock()546 args.v2_1.asParam.ucDCEClkType = clk_type; in amdgpu_atombios_crtc_set_dce_clock()547 args.v2_1.asParam.ucDCEClkSrc = clk_src; in amdgpu_atombios_crtc_set_dce_clock()549 ret_freq = le32_to_cpu(args.v2_1.asParam.ulDCEClkFreq) * 10; in amdgpu_atombios_crtc_set_dce_clock()
1571 struct _ATOM_VRAM_INFO_HEADER_V2_1 v2_1; member1605 if (module_index < vram_info->v2_1.ucNumOfVRAMModule) { in amdgpu_atombios_init_mc_reg_table()1608 ((u8 *)vram_info + le16_to_cpu(vram_info->v2_1.usMemClkPatchTblOffset)); in amdgpu_atombios_init_mc_reg_table()
3817 struct _ATOM_VRAM_INFO_HEADER_V2_1 v2_1; member3880 if (module_index < vram_info->v2_1.ucNumOfVRAMModule) { in radeon_atom_get_memory_info()3882 (ATOM_VRAM_MODULE_V7 *)vram_info->v2_1.aVramInfo; in radeon_atom_get_memory_info()4005 if (module_index < vram_info->v2_1.ucNumOfVRAMModule) { in radeon_atom_init_mc_reg_table()4008 ((u8 *)vram_info + le16_to_cpu(vram_info->v2_1.usMemClkPatchTblOffset)); in radeon_atom_init_mc_reg_table()
