Searched refs:uvd_table (Results 1 – 5 of 5) sorted by relevance
449 struct phm_uvd_clock_voltage_dependency_table *uvd_table = in smu8_upload_pptable_to_smu() local471 PP_ASSERT_WITH_CODE((uvd_table->count <= SMU8_MAX_HARDWARE_POWERLEVELS), in smu8_upload_pptable_to_smu()511 (i < uvd_table->count) ? (uint8_t)uvd_table->entries[i].v : 0; in smu8_upload_pptable_to_smu()513 (i < uvd_table->count) ? uvd_table->entries[i].vclk : 0; in smu8_upload_pptable_to_smu()523 (i < uvd_table->count) ? (uint8_t)uvd_table->entries[i].v : 0; in smu8_upload_pptable_to_smu()525 (i < uvd_table->count) ? uvd_table->entries[i].dclk : 0; in smu8_upload_pptable_to_smu()1676 struct phm_uvd_clock_voltage_dependency_table *uvd_table = in smu8_read_sensor() local1720 vclk = uvd_table->entries[uvd_index].vclk; in smu8_read_sensor()1732 dclk = uvd_table->entries[uvd_index].dclk; in smu8_read_sensor()
1086 struct phm_uvd_clock_voltage_dependency_table *uvd_table; in get_uvd_clock_voltage_limit_table() local1092 uvd_table = kzalloc(table_size, GFP_KERNEL); in get_uvd_clock_voltage_limit_table()1093 if (NULL == uvd_table) in get_uvd_clock_voltage_limit_table()1096 uvd_table->count = table->numEntries; in get_uvd_clock_voltage_limit_table()1101 uvd_table->entries[i].v = (unsigned long)le16_to_cpu(table->entries[i].usVoltage); in get_uvd_clock_voltage_limit_table()1102 uvd_table->entries[i].vclk = ((unsigned long)entry->ucVClkHigh << 16) in get_uvd_clock_voltage_limit_table()1104 uvd_table->entries[i].dclk = ((unsigned long)entry->ucDClkHigh << 16) in get_uvd_clock_voltage_limit_table()1108 *ptable = uvd_table; in get_uvd_clock_voltage_limit_table()
1520 struct phm_uvd_clock_voltage_dependency_table *uvd_table = in ci_populate_smc_uvd_level() local1523 table->UvdLevelCount = (uint8_t)(uvd_table->count); in ci_populate_smc_uvd_level()1527 uvd_table->entries[count].vclk; in ci_populate_smc_uvd_level()1529 uvd_table->entries[count].dclk; in ci_populate_smc_uvd_level()1531 uvd_table->entries[count].v * VOLTAGE_SCALE; in ci_populate_smc_uvd_level()2854 struct phm_uvd_clock_voltage_dependency_table *uvd_table = in ci_update_uvd_smc_table() local2864 if (PP_CAP(PHM_PlatformCaps_UVDDPM) || uvd_table->count <= 0) in ci_update_uvd_smc_table()2867 smu_data->smc_state_table.UvdBootLevel = uvd_table->count - 1; in ci_update_uvd_smc_table()2874 for (i = uvd_table->count - 1; i >= 0; i--) { in ci_update_uvd_smc_table()2875 if (uvd_table->entries[i].v <= max_vddc) in ci_update_uvd_smc_table()
1986 struct radeon_uvd_clock_voltage_dependency_table *uvd_table = in kv_patch_voltage_values() local1995 if (uvd_table->count) { in kv_patch_voltage_values()1996 for (i = 0; i < uvd_table->count; i++) in kv_patch_voltage_values()1997 uvd_table->entries[i].v = in kv_patch_voltage_values()1999 uvd_table->entries[i].v); in kv_patch_voltage_values()
2055 struct amdgpu_uvd_clock_voltage_dependency_table *uvd_table = in kv_patch_voltage_values() local2064 if (uvd_table->count) { in kv_patch_voltage_values()2065 for (i = 0; i < uvd_table->count; i++) in kv_patch_voltage_values()2066 uvd_table->entries[i].v = in kv_patch_voltage_values()2068 uvd_table->entries[i].v); in kv_patch_voltage_values()
