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Searched refs:training_lane (Results 1 – 3 of 3) sorted by relevance

/Linux-v4.19/drivers/gpu/drm/bridge/analogix/
Danalogix_dp_core.h154 u8 training_lane[4]; member
227 u32 training_lane);
229 u32 training_lane);
231 u32 training_lane);
233 u32 training_lane);
Danalogix_dp_core.c508 u8 voltage_swing, pre_emphasis, training_lane; in analogix_dp_get_adjust_training_lane() local
516 training_lane = DPCD_VOLTAGE_SWING_SET(voltage_swing) | in analogix_dp_get_adjust_training_lane()
520 training_lane |= DP_TRAIN_MAX_SWING_REACHED; in analogix_dp_get_adjust_training_lane()
522 training_lane |= DP_TRAIN_MAX_PRE_EMPHASIS_REACHED; in analogix_dp_get_adjust_training_lane()
524 dp->link_train.training_lane[lane] = training_lane; in analogix_dp_get_adjust_training_lane()
531 u8 voltage_swing, pre_emphasis, training_lane; in analogix_dp_process_clock_recovery() local
561 training_lane = analogix_dp_get_lane_link_training( in analogix_dp_process_clock_recovery()
568 if (DPCD_VOLTAGE_SWING_GET(training_lane) == in analogix_dp_process_clock_recovery()
570 DPCD_PRE_EMPHASIS_GET(training_lane) == in analogix_dp_process_clock_recovery()
590 dp->link_train.training_lane[lane], lane); in analogix_dp_process_clock_recovery()
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Danalogix_dp_reg.c746 u32 training_lane) in analogix_dp_set_lane0_link_training() argument
750 reg = training_lane; in analogix_dp_set_lane0_link_training()
755 u32 training_lane) in analogix_dp_set_lane1_link_training() argument
759 reg = training_lane; in analogix_dp_set_lane1_link_training()
764 u32 training_lane) in analogix_dp_set_lane2_link_training() argument
768 reg = training_lane; in analogix_dp_set_lane2_link_training()
773 u32 training_lane) in analogix_dp_set_lane3_link_training() argument
777 reg = training_lane; in analogix_dp_set_lane3_link_training()