Searched refs:tiles (Results 1 – 17 of 17) sorted by relevance
| /Linux-v4.19/drivers/gpu/drm/nouveau/nvkm/subdev/fb/ |
| D | nv25.c | 33 u32 tiles = DIV_ROUND_UP(size, 0x40); in nv25_fb_tile_comp() local
34 u32 tags = round_up(tiles / fb->ram->parts, 0x40); in nv25_fb_tile_comp()
|
| D | nv35.c | 33 u32 tiles = DIV_ROUND_UP(size, 0x40); in nv35_fb_tile_comp() local
34 u32 tags = round_up(tiles / fb->ram->parts, 0x40); in nv35_fb_tile_comp()
|
| D | nv36.c | 33 u32 tiles = DIV_ROUND_UP(size, 0x40); in nv36_fb_tile_comp() local
34 u32 tags = round_up(tiles / fb->ram->parts, 0x40); in nv36_fb_tile_comp()
|
| D | nv40.c | 33 u32 tiles = DIV_ROUND_UP(size, 0x80); in nv40_fb_tile_comp() local
34 u32 tags = round_up(tiles / fb->ram->parts, 0x100); in nv40_fb_tile_comp()
|
| D | nv20.c | 46 u32 tiles = DIV_ROUND_UP(size, 0x40); in nv20_fb_tile_comp() local
47 u32 tags = round_up(tiles / fb->ram->parts, 0x40); in nv20_fb_tile_comp()
|
| D | nv30.c | 52 u32 tiles = DIV_ROUND_UP(size, 0x40); in nv30_fb_tile_comp() local
53 u32 tags = round_up(tiles / fb->ram->parts, 0x40); in nv30_fb_tile_comp()
|
| /Linux-v4.19/Documentation/media/uapi/v4l/ |
| D | pixfmt-nv12m.rst | 33 ``V4L2_PIX_FMT_NV12M`` with 16x16 macroblock tiles. Here pixels are
34 arranged in 16x16 2D tiles and tiles are arranged in linear order in
|
| /Linux-v4.19/arch/arm/include/debug/ |
| D | vexpress.S | 31 @ - all other (RS1 complaint) tiles use UART mapped
|
| /Linux-v4.19/Documentation/devicetree/bindings/arm/ |
| D | vexpress.txt | 5 or more daughterboards (tiles). The motherboard provides a set of
6 peripherals. Processor and RAM "live" on the tiles.
110 - when describing tiles consisting more than one DCC, its number
|
| D | arm-boards | 4 tiles of ARMv4, ARMv5 and ARMv6 type.
72 core tiles. The hardware configuration of the Versatile boards is
|
| D | l2c2x0.txt | 80 Some core tiles, especially ARM PB11MPCore have a faulty L220 cache that
|
| /Linux-v4.19/Documentation/ABI/testing/ |
| D | sysfs-driver-hid-picolcd | 41 tiles get changed and it's not appropriate to expect the application
|
| /Linux-v4.19/arch/arm/mach-vexpress/ |
| D | Kconfig | 28 ARM core and logic (FPGA) tiles on the Versatile Express motherboard,
|
| /Linux-v4.19/arch/arm/boot/dts/ |
| D | arm-realview-eb.dts | 42 * core tiles.
|
| /Linux-v4.19/arch/arm/ |
| D | Kconfig.debug | 1263 bool "Autodetect UART0 on Versatile Express Cortex-A core tiles"
1270 Note that this will only work with standard A-class core tiles,
1282 bool "Use PL011 UART0 at 0x1c090000 (RS1 complaint tiles)"
1287 of the tiles using the RS1 memory map, including all new A-class
1288 core tiles, FPGA-based SMMs and software models.
1291 bool "Use PL011 UART0 at 0xb0090000 (Cortex-R compliant tiles)"
1296 Cortex-R series tiles and SMMs, such as Cortex-R5 and Cortex-R7
|
| /Linux-v4.19/drivers/video/fbdev/ |
| D | Kconfig | 224 where the screen is divided into rectangular sections (tiles), whereas
227 parameters in terms of number of tiles instead of number of pixels.
231 terms of number of tiles in the x- and y-axis.
|
| /Linux-v4.19/drivers/gpu/drm/i915/ |
| D | intel_display.c | 2241 unsigned int tiles; in __intel_adjust_tile_offset() local
2247 tiles = (old_offset - new_offset) / tile_size; in __intel_adjust_tile_offset()
2249 *y += tiles / pitch_tiles * tile_height; in __intel_adjust_tile_offset()
2250 *x += tiles % pitch_tiles * tile_width; in __intel_adjust_tile_offset()
2340 unsigned int tile_rows, tiles, pitch_tiles; in _intel_compute_tile_offset() local
2355 tiles = *x / tile_width; in _intel_compute_tile_offset()
2358 offset = (tile_rows * pitch_tiles + tiles) * tile_size; in _intel_compute_tile_offset()
|
