| /Linux-v4.19/drivers/gpu/drm/i915/gvt/ |
| D | fb_decoder.c | 147 u32 tiled, int stride_mask, int bpp) in intel_vgpu_get_stride() argument
157 switch (tiled) { in intel_vgpu_get_stride()
177 tiled); in intel_vgpu_get_stride()
223 plane->tiled = val & PLANE_CTL_TILED_MASK; in intel_vgpu_decode_primary_plane()
238 plane->tiled = !!(val & DISPPLANE_TILED); in intel_vgpu_decode_primary_plane()
262 plane->stride = intel_vgpu_get_stride(vgpu, pipe, plane->tiled, in intel_vgpu_decode_primary_plane()
434 plane->tiled = !!(val & SPRITE_TILED); in intel_vgpu_decode_sprite_plane()
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| D | fb_decoder.h | 104 u32 tiled; /* tiling mode: linear, X-tiled, Y tiled, etc */ member
119 u8 tiled; /* X-tiled */ member
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| D | dmabuf.c | 228 switch (p.tiled) { in vgpu_get_plane_info()
242 gvt_vgpu_err("invalid tiling mode: %x\n", p.tiled); in vgpu_get_plane_info()
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| /Linux-v4.19/Documentation/devicetree/bindings/media/ |
| D | fsl-vdoa.txt | 5 is to reorder video data from the macroblock tiled order produced by the CODA
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| /Linux-v4.19/include/uapi/drm/ |
| D | omap_drm.h | 61 } tiled; /* (for tiled formats) */ member
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| /Linux-v4.19/drivers/gpu/drm/omapdrm/ |
| D | omap_gem.c | 1191 tiler_align(gem2fmt(flags), &gsize.tiled.width, in omap_gem_new()
1192 &gsize.tiled.height); in omap_gem_new()
1194 size = tiler_size(gem2fmt(flags), gsize.tiled.width, in omap_gem_new()
1195 gsize.tiled.height); in omap_gem_new()
1197 omap_obj->width = gsize.tiled.width; in omap_gem_new()
1198 omap_obj->height = gsize.tiled.height; in omap_gem_new()
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| /Linux-v4.19/drivers/gpu/drm/radeon/ |
| D | radeon_fb.c | 86 int radeon_align_pitch(struct radeon_device *rdev, int width, int cpp, bool tiled) in radeon_align_pitch() argument
89 int align_large = (ASIC_IS_AVIVO(rdev)) || tiled; in radeon_align_pitch()
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| D | r600_cs.c | 2382 u32 header, cmd, count, tiled; in r600_dma_cs_parse() local
2398 tiled = GET_DMA_T(header); in r600_dma_cs_parse()
2407 if (tiled) { in r600_dma_cs_parse()
2438 if (tiled) { in r600_dma_cs_parse()
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| D | radeon_mode.h | 989 int radeon_align_pitch(struct radeon_device *rdev, int width, int bpp, bool tiled);
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| /Linux-v4.19/Documentation/media/uapi/v4l/ |
| D | pixfmt-nv12m.rst | 32 ``V4L2_PIX_FMT_NV12MT_16X16`` is the tiled version of
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| /Linux-v4.19/drivers/gpu/drm/exynos/ |
| D | exynos_drm_fimc.c | 367 static void fimc_src_set_fmt(struct fimc_context *ctx, u32 fmt, bool tiled) in fimc_src_set_fmt() argument
409 if (tiled) in fimc_src_set_fmt()
631 static void fimc_dst_set_fmt(struct fimc_context *ctx, u32 fmt, bool tiled) in fimc_dst_set_fmt() argument
680 if (tiled) in fimc_dst_set_fmt()
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| /Linux-v4.19/drivers/gpu/drm/amd/amdgpu/ |
| D | amdgpu_fb.c | 84 int amdgpu_align_pitch(struct amdgpu_device *adev, int width, int cpp, bool tiled) in amdgpu_align_pitch() argument
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| D | amdgpu_mode.h | 632 int amdgpu_align_pitch(struct amdgpu_device *adev, int width, int bpp, bool tiled);
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| /Linux-v4.19/net/netfilter/ipvs/ |
| D | Kconfig | 281 stored in a hash table. This table is tiled by each destination
284 tiled an amount proportional to the weights specified. The table
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| /Linux-v4.19/Documentation/gpu/ |
| D | tegra.rst | 146 with Tegra-specific flags. This is useful for buffers that should be tiled, or
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| /Linux-v4.19/drivers/gpu/drm/nouveau/nvkm/engine/ce/fuc/ |
| D | com.fuc | 515 // Setup to handle a tiled surface
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