Searched refs:table_info (Results 1 – 11 of 11) sorted by relevance
175 struct phm_ppt_v2_information *table_info = in vega10_set_features_platform_caps() local264 if (table_info->tdp_table->usClockStretchAmount && in vega10_set_features_platform_caps()285 struct phm_ppt_v2_information *table_info = in vega10_odn_initial_default_setting() local303 vddc_lookup_table = table_info->vddc_lookup_table; in vega10_odn_initial_default_setting()310 dep_table[0] = table_info->vdd_dep_on_sclk; in vega10_odn_initial_default_setting()311 dep_table[1] = table_info->vdd_dep_on_mclk; in vega10_odn_initial_default_setting()312 dep_table[2] = table_info->vdd_dep_on_socclk; in vega10_odn_initial_default_setting()493 struct phm_ppt_v2_information *table_info = in vega10_get_socclk_for_voltage_evv() local501 for (entry_id = 0; entry_id < table_info->vdd_dep_on_sclk->count; entry_id++) { in vega10_get_socclk_for_voltage_evv()502 voltage_id = table_info->vdd_dep_on_socclk->entries[entry_id].vddInd; in vega10_get_socclk_for_voltage_evv()[all …]
251 struct phm_ppt_v1_information *table_info = in smu7_construct_voltage_tables() local266 table_info->vdd_dep_on_mclk); in smu7_construct_voltage_tables()286 table_info->vdd_dep_on_mclk); in smu7_construct_voltage_tables()298 table_info->vddgfx_lookup_table); in smu7_construct_voltage_tables()317 table_info->vddc_lookup_table); in smu7_construct_voltage_tables()528 struct phm_ppt_v1_information *table_info = in smu7_setup_default_pcie_table() local539 if (table_info != NULL) in smu7_setup_default_pcie_table()540 pcie_table = table_info->pcie_table; in smu7_setup_default_pcie_table()755 struct phm_ppt_v1_information *table_info = in smu7_setup_dpm_tables_v1() local762 if (table_info == NULL) in smu7_setup_dpm_tables_v1()[all …]
418 struct phm_ppt_v1_information *table_info = in phm_get_sclk_for_voltage_evv() local424 for (entry_id = 0; entry_id < table_info->vdd_dep_on_sclk->count; entry_id++) { in phm_get_sclk_for_voltage_evv()425 voltage_id = table_info->vdd_dep_on_sclk->entries[entry_id].vddInd; in phm_get_sclk_for_voltage_evv()430 if (entry_id >= table_info->vdd_dep_on_sclk->count) { in phm_get_sclk_for_voltage_evv()435 *sclk = table_info->vdd_dep_on_sclk->entries[entry_id].clk; in phm_get_sclk_for_voltage_evv()488 struct phm_ppt_v1_information *table_info = in phm_apply_dal_min_voltage_request() local491 table_info->vddc_dep_on_dal_pwrl; in phm_apply_dal_min_voltage_request()508 vddc_table = table_info->vdd_dep_on_sclk; in phm_apply_dal_min_voltage_request()
1287 struct phm_ppt_v2_information *table_info = in vega10_initialize_power_tune_defaults() local1289 struct phm_tdp_table *tdp_table = table_info->tdp_table; in vega10_initialize_power_tune_defaults()1337 struct phm_ppt_v2_information *table_info = in vega10_enable_power_containment() local1339 struct phm_tdp_table *tdp_table = table_info->tdp_table; in vega10_enable_power_containment()
1112 struct phm_ppt_v1_information *table_info = in smu7_enable_power_containment() local1120 cac_table = table_info->cac_dtp_table; in smu7_enable_power_containment()1197 struct phm_ppt_v1_information *table_info = in smu7_power_control_set_level() local1205 cac_table = table_info->cac_dtp_table; in smu7_power_control_set_level()
743 struct phm_ppt_v2_information *table_info = in get_pcie_table() local761 pcie_count = table_info->vdd_dep_on_sclk->count; in get_pcie_table()
1596 struct phm_ppt_v2_information *table_info = in vega12_get_dal_power_level()1599 &table_info->max_clock_voltage_on_ac; in vega12_get_dal_power_level()
336 struct phm_ppt_v1_information *table_info = in vegam_update_uvd_smc_table() local340 if (table_info->mm_dep_table->count > 0) in vegam_update_uvd_smc_table()342 (uint8_t) (table_info->mm_dep_table->count - 1); in vegam_update_uvd_smc_table()368 struct phm_ppt_v1_information *table_info = in vegam_update_vce_smc_table() local374 (uint8_t) (table_info->mm_dep_table->count - 1); in vegam_update_vce_smc_table()399 struct phm_ppt_v1_information *table_info = in vegam_update_bif_smc_table() local401 struct phm_ppt_v1_pcie_table *pcie_table = table_info->pcie_table; in vegam_update_bif_smc_table()434 struct phm_ppt_v1_information *table_info = in vegam_initialize_power_tune_defaults() local437 if (table_info && in vegam_initialize_power_tune_defaults()438 table_info->cac_dtp_table->usPowerTuneDataSetID <= POWERTUNE_DEFAULT_SET_MAX && in vegam_initialize_power_tune_defaults()[all …]
429 struct phm_ppt_v1_information *table_info = in polaris10_populate_bapm_parameters_in_dpm_table() local431 struct phm_cac_tdp_table *cac_dtp_table = table_info->cac_dtp_table; in polaris10_populate_bapm_parameters_in_dpm_table()488 struct phm_ppt_v1_information *table_info = in polaris10_populate_tdc_limit() local492 tdc_limit = (uint16_t)(table_info->cac_dtp_table->usTDC * 128); in polaris10_populate_tdc_limit()568 struct phm_ppt_v1_information *table_info = in polaris10_populate_bapm_vddc_base_leakage_sidd() local572 struct phm_cac_tdp_table *cac_table = table_info->cac_dtp_table; in polaris10_populate_bapm_vddc_base_leakage_sidd()703 struct phm_ppt_v1_information *table_info = in polaris10_populate_cac_table() local706 table_info->vddc_lookup_table; in polaris10_populate_cac_table()737 struct phm_ppt_v1_information *table_info = in polaris10_populate_ulv_level() local743 state->VddcOffset = (uint16_t) table_info->us_ulv_voltage_offset; in polaris10_populate_ulv_level()[all …]
482 struct phm_ppt_v1_information *table_info = in fiji_initialize_power_tune_defaults() local485 if (table_info && in fiji_initialize_power_tune_defaults()486 table_info->cac_dtp_table->usPowerTuneDataSetID <= POWERTUNE_DEFAULT_SET_MAX && in fiji_initialize_power_tune_defaults()487 table_info->cac_dtp_table->usPowerTuneDataSetID) in fiji_initialize_power_tune_defaults()490 [table_info->cac_dtp_table->usPowerTuneDataSetID - 1]; in fiji_initialize_power_tune_defaults()504 struct phm_ppt_v1_information *table_info = in fiji_populate_bapm_parameters_in_dpm_table() local506 struct phm_cac_tdp_table *cac_dtp_table = table_info->cac_dtp_table; in fiji_populate_bapm_parameters_in_dpm_table()598 struct phm_ppt_v1_information *table_info = in fiji_populate_tdc_limit() local605 tdc_limit = (uint16_t)(table_info->cac_dtp_table->usTDC * 128); in fiji_populate_tdc_limit()684 struct phm_ppt_v1_information *table_info = in fiji_populate_bapm_vddc_base_leakage_sidd() local[all …]
472 struct phm_ppt_v1_information *table_info = in tonga_populate_ulv_level() local478 state->VddcOffset = (uint16_t) table_info->us_ulv_voltage_offset; in tonga_populate_ulv_level()479 state->VddcOffsetVid = (uint8_t)(table_info->us_ulv_voltage_offset * in tonga_populate_ulv_level()1136 struct phm_ppt_v1_information *table_info = in tonga_populate_mvdd_value() local1142 for (i = 0; i < table_info->vdd_dep_on_mclk->count; i++) { in tonga_populate_mvdd_value()1143 if (mclk <= table_info->vdd_dep_on_mclk->entries[i].clk) { in tonga_populate_mvdd_value()1151 PP_ASSERT_WITH_CODE(i < table_info->vdd_dep_on_mclk->count, in tonga_populate_mvdd_value()1571 struct phm_ppt_v1_information *table_info = in tonga_populate_clock_stretcher_data_table() local1574 table_info->vdd_dep_on_sclk; in tonga_populate_clock_stretcher_data_table()1578 stretch_amount = (uint8_t)table_info->cac_dtp_table->usClockStretchAmount; in tonga_populate_clock_stretcher_data_table()[all …]
