Searched refs:smpl_phase (Results 1 – 1 of 1) sorted by relevance
221 int smpl_phase) in dw_mci_hs_set_timing() argument236 if (smpl_phase == -1) in dw_mci_hs_set_timing()237 smpl_phase = (hs_timing_cfg[ctrl_id][timing].smpl_phase_max + in dw_mci_hs_set_timing()242 if (smpl_phase >= USE_DLY_MIN_SMPL && in dw_mci_hs_set_timing()243 smpl_phase <= USE_DLY_MAX_SMPL) in dw_mci_hs_set_timing()247 if (smpl_phase >= ENABLE_SHIFT_MIN_SMPL && in dw_mci_hs_set_timing()248 smpl_phase <= ENABLE_SHIFT_MAX_SMPL) in dw_mci_hs_set_timing()256 reg_value = FIELD_PREP(UHS_REG_EXT_SAMPLE_PHASE_MASK, smpl_phase) | in dw_mci_hs_set_timing()376 int smpl_phase = 0; in dw_mci_hi3660_execute_tuning() local380 for (i = 0; i < NUM_PHASES; ++i, ++smpl_phase) { in dw_mci_hi3660_execute_tuning()[all …]
