Home
last modified time | relevance | path

Searched refs:slice_mask (Results 1 – 14 of 14) sorted by relevance

/Linux-v4.19/arch/powerpc/mm/
Dslice.c45 static void slice_print_mask(const char *label, const struct slice_mask *mask) in slice_print_mask()
59 static void slice_print_mask(const char *label, const struct slice_mask *mask) {} in slice_print_mask()
65 struct slice_mask *ret) in slice_range_to_mask()
123 static void slice_mask_for_free(struct mm_struct *mm, struct slice_mask *ret, in slice_mask_for_free()
145 static struct slice_mask *slice_mask_for_size(struct mm_struct *mm, int psize) in slice_mask_for_size()
162 static struct slice_mask *slice_mask_for_size(struct mm_struct *mm, int psize) in slice_mask_for_size()
179 const struct slice_mask *available, in slice_check_range_fits()
228 const struct slice_mask *mask, int psize) in slice_convert()
233 struct slice_mask *psize_mask, *old_mask; in slice_convert()
302 const struct slice_mask *available, in slice_scan_available()
[all …]
/Linux-v4.19/arch/powerpc/include/asm/book3s/64/
Dmmu.h88 struct slice_mask { struct
123 struct slice_mask mask_64k;
125 struct slice_mask mask_4k;
127 struct slice_mask mask_16m;
128 struct slice_mask mask_16g;
/Linux-v4.19/arch/powerpc/include/asm/
Dmmu-8xx.h195 struct slice_mask { struct
209 struct slice_mask mask_base_psize; /* 4k or 16k */ argument
211 struct slice_mask mask_512k;
212 struct slice_mask mask_8m;
/Linux-v4.19/drivers/gpu/drm/i915/
Dintel_device_info.c87 hweight8(sseu->slice_mask), sseu->slice_mask); in sseu_dump()
183 sseu->slice_mask |= BIT(s); in gen11_sseu_info_init()
208 sseu->slice_mask = (fuse2 & GEN10_F2_S_ENA_MASK) >> in gen10_sseu_info_init()
284 sseu->slice_mask = BIT(0); in cherryview_sseu_info_init()
339 sseu->slice_mask = (fuse2 & GEN8_F2_S_ENA_MASK) >> GEN8_F2_S_ENA_SHIFT; in gen9_sseu_info_init()
359 if (!(sseu->slice_mask & BIT(s))) in gen9_sseu_info_init()
412 !IS_GEN9_LP(dev_priv) && hweight8(sseu->slice_mask) > 1; in gen9_sseu_info_init()
441 sseu->slice_mask = (fuse2 & GEN8_F2_S_ENA_MASK) >> GEN8_F2_S_ENA_SHIFT; in broadwell_sseu_info_init()
467 if (!(sseu->slice_mask & BIT(s))) in broadwell_sseu_info_init()
511 sseu->has_slice_pg = hweight8(sseu->slice_mask) > 1; in broadwell_sseu_info_init()
[all …]
Di915_query.c26 BUILD_BUG_ON(sizeof(u8) != sizeof(sseu->slice_mask)); in query_topology_info()
28 slice_length = sizeof(sseu->slice_mask); in query_topology_info()
70 &sseu->slice_mask, slice_length)) in query_topology_info()
Dintel_device_info.h120 u8 slice_mask; member
Dintel_workarounds.c753 is_power_of_2(sseu->slice_mask)) { in wa_init_mcr()
758 u32 slice = fls(sseu->slice_mask); in wa_init_mcr()
Di915_debugfs.c4259 sseu->slice_mask = BIT(0); in cherryview_sseu_device_status()
4307 sseu->slice_mask |= BIT(s); in gen10_sseu_device_status()
4356 sseu->slice_mask |= BIT(s); in gen9_sseu_device_status()
4390 sseu->slice_mask = slice_info & GEN8_LSLICESTAT_MASK; in broadwell_sseu_device_status()
4392 if (sseu->slice_mask) { in broadwell_sseu_device_status()
4395 for (s = 0; s < fls(sseu->slice_mask); s++) { in broadwell_sseu_device_status()
4403 for (s = 0; s < fls(sseu->slice_mask); s++) { in broadwell_sseu_device_status()
4420 sseu->slice_mask); in i915_print_sseu_info()
4422 hweight8(sseu->slice_mask)); in i915_print_sseu_info()
4425 for (s = 0; s < fls(sseu->slice_mask); s++) { in i915_print_sseu_info()
Dintel_ringbuffer.h95 1 : INTEL_INFO(dev_priv__)->sseu.slice_mask)
Dintel_engine_cs.c818 u32 slice = fls(sseu->slice_mask); in intel_calculate_mcr_s_ss_select()
Di915_drv.c432 value = INTEL_INFO(dev_priv)->sseu.slice_mask; in i915_getparam_ioctl()
Dintel_lrc.c2514 rpcs |= hweight8(INTEL_INFO(dev_priv)->sseu.slice_mask) << in make_rpcs()
/Linux-v4.19/drivers/crypto/qat/qat_common/
Dicp_qat_fw_loader_handle.h62 unsigned int slice_mask; member
Dqat_hal.c321 ae_reset_csr |= handle->hal_handle->slice_mask << RST_CSR_QAT_LSB; in qat_hal_reset()
493 ae_reset_csr &= ~(handle->hal_handle->slice_mask << RST_CSR_QAT_LSB); in qat_hal_clr_reset()
500 (handle->hal_handle->slice_mask << RST_CSR_QAT_LSB)) & csr); in qat_hal_clr_reset()
504 clk_csr |= handle->hal_handle->slice_mask << 20; in qat_hal_clr_reset()
731 handle->hal_handle->slice_mask = hw_data->accel_mask; in qat_hal_init()