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Searched refs:slcr (Results 1 – 12 of 12) sorted by relevance

/Linux-v4.19/drivers/reset/
Dreset-zynq.c29 struct regmap *slcr; member
48 return regmap_update_bits(priv->slcr, in zynq_reset_assert()
65 return regmap_update_bits(priv->slcr, in zynq_reset_deassert()
84 ret = regmap_read(priv->slcr, priv->offset + (bank * 4), &reg); in zynq_reset_status()
107 priv->slcr = syscon_regmap_lookup_by_phandle(pdev->dev.of_node, in zynq_reset_probe()
109 if (IS_ERR(priv->slcr)) { in zynq_reset_probe()
111 return PTR_ERR(priv->slcr); in zynq_reset_probe()
/Linux-v4.19/drivers/fpga/
Dzynq-fpga.c135 struct regmap *slcr; member
294 regmap_write(priv->slcr, SLCR_FPGA_RST_CTRL_OFFSET, in zynq_fpga_ops_write_init()
298 regmap_write(priv->slcr, SLCR_LVL_SHFTR_EN_OFFSET, in zynq_fpga_ops_write_init()
301 regmap_write(priv->slcr, SLCR_LVL_SHFTR_EN_OFFSET, in zynq_fpga_ops_write_init()
517 regmap_write(priv->slcr, SLCR_LVL_SHFTR_EN_OFFSET, in zynq_fpga_ops_write_complete()
521 regmap_write(priv->slcr, SLCR_FPGA_RST_CTRL_OFFSET, in zynq_fpga_ops_write_complete()
575 priv->slcr = syscon_regmap_lookup_by_phandle(dev->of_node, in zynq_fpga_probe()
577 if (IS_ERR(priv->slcr)) { in zynq_fpga_probe()
579 return PTR_ERR(priv->slcr); in zynq_fpga_probe()
/Linux-v4.19/arch/arm/boot/dts/
Dzynq-7000.dtsi242 slcr: slcr@f8000000 { label
245 compatible = "xlnx,zynq-slcr", "syscon", "simple-mfd";
270 syscon = <&slcr>;
276 syscon = <&slcr>;
305 syscon = <&slcr>;
/Linux-v4.19/Documentation/devicetree/bindings/reset/
Dzynq-reset.txt10 - syscon: <&slcr>
21 syscon = <&slcr>;
/Linux-v4.19/arch/arm/mach-zynq/
DMakefile6 obj-y := common.o slcr.o pm.o
/Linux-v4.19/drivers/clk/zynq/
Dclkc.c595 struct device_node *slcr; in zynq_clock_init() local
609 slcr = of_get_parent(np); in zynq_clock_init()
611 if (slcr->data) { in zynq_clock_init()
612 zynq_clkc_base = (__force void __iomem *)slcr->data + res.start; in zynq_clock_init()
615 of_node_put(slcr); in zynq_clock_init()
621 of_node_put(slcr); in zynq_clock_init()
/Linux-v4.19/Documentation/devicetree/bindings/fpga/
Dxilinx-zynq-fpga-mgr.txt18 syscon = <&slcr>;
Dfpga-region.txt362 syscon = <&slcr>;
/Linux-v4.19/Documentation/devicetree/bindings/soc/xilinx/
Dxlnx,vcu.txt16 1. vcu slcr
/Linux-v4.19/Documentation/devicetree/bindings/pinctrl/
Dxlnx,zynq-pinctrl.txt81 syscon = <&slcr>;
/Linux-v4.19/drivers/net/ethernet/mellanox/mlxsw/
Dreg.h1221 MLXSW_REG_DEFINE(slcr, MLXSW_REG_SLCR_ID, MLXSW_REG_SLCR_LEN);
1235 MLXSW_ITEM32(reg, slcr, pp, 0x00, 24, 1);
1244 MLXSW_ITEM32(reg, slcr, local_port, 0x00, 16, 8);
1256 MLXSW_ITEM32(reg, slcr, type, 0x00, 0, 4);
1316 MLXSW_ITEM32(reg, slcr, lag_hash, 0x04, 0, 20);
1320 MLXSW_REG_ZERO(slcr, payload); in mlxsw_reg_slcr_pack()
8734 MLXSW_REG(slcr),
Dspectrum.c3670 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(slcr), slcr_pl); in mlxsw_sp_lag_init()