| /Linux-v4.19/drivers/gpu/drm/amd/amdgpu/ |
| D | soc15.c | 293 u32 sh_num, u32 reg_offset) in soc15_read_indexed_register() argument
298 if (se_num != 0xffffffff || sh_num != 0xffffffff) in soc15_read_indexed_register()
299 amdgpu_gfx_select_se_sh(adev, se_num, sh_num, 0xffffffff); in soc15_read_indexed_register()
303 if (se_num != 0xffffffff || sh_num != 0xffffffff) in soc15_read_indexed_register()
311 u32 sh_num, u32 reg_offset) in soc15_get_register_value() argument
314 return soc15_read_indexed_register(adev, se_num, sh_num, reg_offset); in soc15_get_register_value()
325 u32 sh_num, u32 reg_offset, u32 *value) in soc15_read_register() argument
339 se_num, sh_num, reg_offset); in soc15_read_register()
|
| D | gfx_v9_0.h | 29 void gfx_v9_0_select_se_sh(struct amdgpu_device *adev, u32 se_num, u32 sh_num);
|
| D | cik.c | 1028 u32 sh_num, u32 reg_offset) in cik_get_register_value() argument
1033 unsigned sh_idx = (sh_num == 0xffffffff) ? 0 : sh_num; in cik_get_register_value()
1047 if (se_num != 0xffffffff || sh_num != 0xffffffff) in cik_get_register_value()
1048 amdgpu_gfx_select_se_sh(adev, se_num, sh_num, 0xffffffff); in cik_get_register_value()
1052 if (se_num != 0xffffffff || sh_num != 0xffffffff) in cik_get_register_value()
1123 u32 sh_num, u32 reg_offset, u32 *value) in cik_read_register() argument
1134 *value = cik_get_register_value(adev, indexed, se_num, sh_num, in cik_read_register()
|
| D | vi.c | 552 u32 sh_num, u32 reg_offset) in vi_get_register_value() argument
557 unsigned sh_idx = (sh_num == 0xffffffff) ? 0 : sh_num; in vi_get_register_value()
571 if (se_num != 0xffffffff || sh_num != 0xffffffff) in vi_get_register_value()
572 amdgpu_gfx_select_se_sh(adev, se_num, sh_num, 0xffffffff); in vi_get_register_value()
576 if (se_num != 0xffffffff || sh_num != 0xffffffff) in vi_get_register_value()
647 u32 sh_num, u32 reg_offset, u32 *value) in vi_read_register() argument
658 *value = vi_get_register_value(adev, indexed, se_num, sh_num, in vi_read_register()
|
| D | si.c | 1017 u32 sh_num, u32 reg_offset) in si_get_register_value() argument
1022 unsigned sh_idx = (sh_num == 0xffffffff) ? 0 : sh_num; in si_get_register_value()
1034 if (se_num != 0xffffffff || sh_num != 0xffffffff) in si_get_register_value()
1035 amdgpu_gfx_select_se_sh(adev, se_num, sh_num, 0xffffffff); in si_get_register_value()
1039 if (se_num != 0xffffffff || sh_num != 0xffffffff) in si_get_register_value()
1091 u32 sh_num, u32 reg_offset, u32 *value) in si_read_register() argument
1102 *value = si_get_register_value(adev, indexed, se_num, sh_num, in si_read_register()
|
| D | amdgpu_kms.c | 556 unsigned sh_num = (info->read_mmr_reg.instance >> in amdgpu_info_ioctl() local
564 if (sh_num == AMDGPU_INFO_MMR_SH_INDEX_MASK) in amdgpu_info_ioctl()
565 sh_num = 0xffffffff; in amdgpu_info_ioctl()
573 if (amdgpu_asic_read_register(adev, se_num, sh_num, in amdgpu_info_ioctl()
|
| D | gfx_v6_0.c | 1281 u32 sh_num, u32 instance) in gfx_v6_0_select_se_sh() argument
1290 if ((se_num == 0xffffffff) && (sh_num == 0xffffffff)) in gfx_v6_0_select_se_sh()
1295 (sh_num << GRBM_GFX_INDEX__SH_INDEX__SHIFT); in gfx_v6_0_select_se_sh()
1296 else if (sh_num == 0xffffffff) in gfx_v6_0_select_se_sh()
1300 data |= (sh_num << GRBM_GFX_INDEX__SH_INDEX__SHIFT) | in gfx_v6_0_select_se_sh()
|
| D | gfx_v7_0.c | 1588 u32 se_num, u32 sh_num, u32 instance) in gfx_v7_0_select_se_sh() argument
1597 if ((se_num == 0xffffffff) && (sh_num == 0xffffffff)) in gfx_v7_0_select_se_sh()
1602 (sh_num << GRBM_GFX_INDEX__SH_INDEX__SHIFT); in gfx_v7_0_select_se_sh()
1603 else if (sh_num == 0xffffffff) in gfx_v7_0_select_se_sh()
1607 data |= (sh_num << GRBM_GFX_INDEX__SH_INDEX__SHIFT) | in gfx_v7_0_select_se_sh()
|
| D | amdgpu.h | 862 void (*select_se_sh)(struct amdgpu_device *adev, u32 se_num, u32 sh_num, u32 instance);
1144 u32 sh_num, u32 reg_offset, u32 *value);
|
| D | gfx_v9_0.c | 251 static void gfx_v9_0_select_se_sh(struct amdgpu_device *adev, u32 se_num, u32 sh_num, u32 instance);
1670 static void gfx_v9_0_select_se_sh(struct amdgpu_device *adev, u32 se_num, u32 sh_num, u32 instance) in gfx_v9_0_select_se_sh() argument
1684 if (sh_num == 0xffffffff) in gfx_v9_0_select_se_sh()
1687 data = REG_SET_FIELD(data, GRBM_GFX_INDEX, SH_INDEX, sh_num); in gfx_v9_0_select_se_sh()
|
| D | gfx_v8_0.c | 3549 u32 se_num, u32 sh_num, u32 instance) in gfx_v8_0_select_se_sh() argument
3563 if (sh_num == 0xffffffff) in gfx_v8_0_select_se_sh()
3566 data = REG_SET_FIELD(data, GRBM_GFX_INDEX, SH_INDEX, sh_num); in gfx_v8_0_select_se_sh()
|
| /Linux-v4.19/drivers/gpu/drm/radeon/ |
| D | si.c | 2948 u32 se_num, u32 sh_num) in si_select_se_sh() argument
2952 if ((se_num == 0xffffffff) && (sh_num == 0xffffffff)) in si_select_se_sh()
2955 data |= SE_BROADCAST_WRITES | SH_INDEX(sh_num); in si_select_se_sh()
2956 else if (sh_num == 0xffffffff) in si_select_se_sh()
2959 data |= SH_INDEX(sh_num) | SE_INDEX(se_num); in si_select_se_sh()
|
| D | cik.c | 3036 u32 se_num, u32 sh_num) in cik_select_se_sh() argument
3040 if ((se_num == 0xffffffff) && (sh_num == 0xffffffff)) in cik_select_se_sh()
3043 data |= SE_BROADCAST_WRITES | SH_INDEX(sh_num); in cik_select_se_sh()
3044 else if (sh_num == 0xffffffff) in cik_select_se_sh()
3047 data |= SH_INDEX(sh_num) | SE_INDEX(se_num); in cik_select_se_sh()
|
